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MMX™ 技术程序员参考手册

Intel Architecture MMX™ Technology Programmer's Reference Manual

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APPENDIX C
ALPHABETICAL LIST OF IA MMX™ INSTRUCTION SET MNEMONICS

The following table lists the mnemonics of the IA MMX™ instructions in alphabetical order. For each mnemonic, it summarizes the type of source data, the encoding of the first and second bytes in hexadecimal, and the format used.

Table C-1. IA MMX™ Instruction Set Mnemonics
MNEMONIC
OPERAND TYPES
Byte 1
Byte 2
Byte 3, [4]
EMMSNone0F77mod-rm, [sib]
MOVDregister, memory/iregister0F6Emod-rm, [sib]
MOVDmemory/iregister, register0F7Emod-rm, [sib]
MOVQregister, memory/register0F6Fmod-rm, [sib]
MOVQmemory/register, register0F7Fmod-rm, [sib]
PACKSSDWregister, memory/register0F6Bmod-rm, [sib]
PACKSSWBregister, memory/register0F63mod-rm, [sib]
PACKUSWBregister, memory/register0F67mod-rm, [sib]
PADDBregister, memory/register0FFCmod-rm, [sib]
PADDDregister, memory/register0FFEmod-rm, [sib]
PADDSBregister, memory/register0FECmod-rm, [sib]
PADDSWregister, memory/register0FEDmod-rm, [sib]
PADDUSBregister, memory/register0FDCmod-rm, [sib]
PADDUSWregister, memory/register0FDDmod-rm, [sib]
PADDWregister, memory/register0FFDmod-rm, [sib]
PANDregister, memory/register0FDBmod-rm, [sib]
PANDNregister, memory/register0FDFmod-rm, [sib]
PCMPEQBregister, memory/register0F74mod-rm, [sib]
PCMPEQDregister, memory/register0F76mod-rm, [sib]
PCMPEQWregister, memory/register0F75mod-rm, [sib]
PCMPGTBregister, memory/register0F64mod-rm, [sib]
PCMPGTDregister, memory/register0F66mod-rm, [sib]
PCMPGTWregister, memory/register0F65mod-rm, [sib]
PMADDWDregister, memory/register0FF5mod-rm, [sib]
PMULHWregister, memory/register0FE5mod-rm, [sib]
PMULLWregister, memory/register0FD5mod-rm, [sib]
PORregister, memory/register0FEBmod-rm, [sib]
PSHIMD*register, immediate0F72mod-rm, imm
PSHIMQ*register, immediate0F73mod-rm, imm
PSHIMW*register, immediate0F71mod-rm, imm
PSLLDregister, memory/register0FF2mod-rm, [sib]
PSLLQregister, memory/register0FF3mod-rm, [sib]
PSLLWregister, memory/register0FF1mod-rm, [sib]
PSRADregister, memory/register0FE2mod-rm, [sib]
PSRAWregister, memory/register0FE1mod-rm, [sib]
PSRLDregister, memory/register0FD2mod-rm, [sib]
PSRLQregister, memory/register0FD3mod-rm, [sib]
PSRLWregister, memory/register0FD1mod-rm, [sib]
PSUBBregister, memory/register0FF8mod-rm, [sib]
PSUBDregister, memory/register0FFAmod-rm, [sib]
PSUBSBregister, memory/register0FE8mod-rm, [sib]
PSUBSWregister, memory/register0FE9mod-rm, [sib]
PSUBUSBregister, memory/register0FD8mod-rm, [sib]
PSUBUSWregister, memory/register0FD9mod-rm, [sib]
PSUBWregister, memory/register0FF9mod-rm, [sib]
PUNPCKHBWregister, memory/register0F68mod-rm, [sib]
PUNPCKHDQregister, memory/register0F6Amod-rm, [sib]
PUNPCKHWDregister, memory/register0F69mod-rm, [sib]
PUNPCKLBWregister, memory/register0F60mod-rm, [sib]
PUNPCKLDQregister, memory/register0F62mod-rm, [sib]
PUNPCKLWDregister, memory/register0F61mod-rm, [sib]
PXORregister, memory/register0FEFmod-rm, [sib]

Notes:

* These are not the actual mnemonics:

PSHIMD represents the PSLLD, PSRAD and PSRLD instructions when shifting by immediate shift counts.

PSHIMW represents the PSLLW, PSRAW and PSRLW instructions when shifting by immediate shift counts.

PSHIMQ represents the PSLLQ and PSRLQ instructions when shifting by immediate shift counts.

The instructions that shift by immediate counts are differentiated by the ModR/M bytes (See Appendix B).

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