Opcode Database


AAA 37 n/a ASCII adjust after addition. 86
AAD D5 0A n/a ASCII adjust AX before division. 86
AAM D4 0A n/a ASCII adjust AX after multiply. 86
AAS 3F n/a ASCII adjust AL after subtraction. 86
ADC 14 ib AL, imm8 Add two integers with carry. 86
ADC 15 iv eAX, imm Add two integers with carry. 86/386
ADC 81 /2 iv r/m, imm Add two integers with carry. 86/386
ADC 83 /2 ib r/m, imm8 Add two integers with carry. 86/386
ADC 11 /r r/m, r Add two integers with carry. 86/386
ADC 80 /2 ib r/m8, imm8 Add two integers with carry. 86
ADC 82 /2 ib r/m8, imm8 Add two integers with carry. 86
ADC 10 /r r/m8, r8 Add two integers with carry. 86
ADC 13 /r r, r/m Add two integers with carry. 86/386
ADC 12 /r r8, r/m8 Add two integers with carry. 86
ADD 04 ib AL, imm8 Add two integers. 86
ADD 05 iv eAX, imm Add two integers. 86/386
ADD 81 /0 iv r/m, imm Add two integers. 86/386
ADD 83 /0 ib r/m, imm8 Add two integers. 86/386
ADD 01 /r r/m, r Add two integers. 86/386
ADD 80 /0 ib r/m8, imm8 Add two integers. 86
ADD 82 /0 ib r/m8, imm8 Add two integers. 86
ADD 00 /r r/m8, r8 Add two integers. 86
ADD 03 /r r, r/m Add two integers. 86/386
ADD 02 /r r8, r/m8 Add two integers. 86
ADDPD 66 0F 58 /r xmm1, xmm2/m128 Add packed dble-prec. floats. SSE2
ADDPS 0F 58 /r xmm1, xmm2/m128 Add packed sngle-prec. floats. SSE
ADDSD F2 0F 58 /r xmm1, xmm2/m64 Add scalar dble-prec. floats. SSE
ADDSS F3 0F 58 /r xmm1, xmm2/m32 Add scalar sngle-prec. floats. SSE
ADDSUBPD 66 0F D0 /r xmm1, xmm2/m128 Add/Sub packed dble-prec. floats. SSE3
ADDSUBPS F2 0F D0 /r xmm1, xmm2/m128 Add/Sub packed sngle-prec. floats. SSE3
AND 24 ib AL, imm8 Bitwise AND of two integers. 86
AND 25 iv eAX, imm Bitwise AND of two integers. 86/386
AND 81 /4 iv r/m, imm Bitwise AND of two integers. 86/386
AND 83 /4 ib r/m, imm8 Bitwise AND of two integers. 86/386
AND 21 /r r/m, r Bitwise AND of two integers. 86/386
AND 80 /4 ib r/m8, imm8 Bitwise AND of two integers. 86
AND 82 /4 ib r/m8, imm8 Bitwise AND of two integers. 86
AND 20 /r r/m8, r8 Bitwise AND of two integers. 86
AND 23 /r r, r/m Bitwise AND of two integers. 86/386
AND 22 /r r8, r/m8 Bitwise AND of two integers. 86
ANDNPD 66 0F 55 /r xmm1, xmm2/m128 Bitwise AND NOT of packed dble-prec. floats. SSE2
ANDNPS 0F 55 /r xmm1, xmm2/m128 Bitwise AND NOT of packed sngle-prec. floats. SSE
ANDPD 66 0F 54 /r xmm1, xmm2/m128 Bitwise AND of packed dble-prec. floats. SSE2
ANDPS 0F 54 /r xmm1, xmm2/m128 Bitwise AND of packed sngle-prec. floats. SSE
ARPL 63 /r r/m16, r16 Adjust RPL of field of segment selector. 286
BOUND 62 /r r, m Check array index against bounds. 186
BSF 0F BC /r r, r/m Scan for the least significant bit. 386
BSR 0F BD /r r, r/m Scan for the most significant bit. 386
BSWAP 0F C8 EAX Reverses the byte order of 32-bit register. 486
BSWAP 0F CD EBP Reverses the byte order of 32-bit register. 486
BSWAP 0F CB EBX Reverses the byte order of 32-bit register. 486
BSWAP 0F C9 ECX Reverses the byte order of 32-bit register. 486
BSWAP 0F CF EDI Reverses the byte order of 32-bit register. 486
BSWAP 0F CA EDX Reverses the byte order of 32-bit register. 486
BSWAP 0F CE ESI Reverses the byte order of 32-bit register. 486
BSWAP 0F CC ESP Reverses the byte order of 32-bit register. 486
BT 0F BA /4 ib r/m, imm8 Extract a bit to CF. 386
BT 0F A3 /r r/m, r Extract a bit to CF. 386
BTC 0F BA /7 ib r/m, imm8 Extract a bit to CF and complement it. 386
BTC 0F BB /r r/m, r Extract a bit to CF and complement it. 386
BTR 0F BA /6 ib r/m, imm8 Extract a bit to CF and reset it. 386
BTR 0F B3 r/m, r Extract a bit to CF and reset it. 386
BTS 0F BA /5 ib r/m, imm8 Extract a bit to CF and set it. 386
BTS 0F AB r/m, r Extract a bit to CF and set it. 386
CALL 9A iv 1w imm16:imm A far, absolute call to a subroutine. 86
CALL FF /3 m16:m A far, absolute indirect call to a subroutine. 86
CALL FF /2 r/m A near, absolute indirect call to a subroutine. 86
CALL E8 iv rel A near, relative call to a subroutine. 86
CBW 98 n/a Sign-extend AL into AX (or AX into EAX) 86/386
CWDE 98 n/a Sign-extend AL into AX (or AX into EAX) 86/386
CLC F8 n/a Clear CF flag 86
CLD FC n/a Clear DF flag 86
CLFLUSH 0F AE /mem|7 m8 Flushes cache line. SSE2
CLI FA n/a Clear the IF (disable interrupts). 86
CLTS 0F 06 n/a Clear the task-switched (TS) flag in CR0. 286,PRIV
CMC F5 n/a Complement CF flag 86
CMOVA 0F 47 /r r, r/m Move if above (CF=0 and ZF=0) P6
CMOVNBE 0F 47 /r r, r/m Move if above (CF=0 and ZF=0) P6
CMOVAE 0F 43 /r r, r/m Move if above or equal (CF=0) P6
CMOVNB 0F 43 /r r, r/m Move if above or equal (CF=0) P6
CMOVNC 0F 43 /r r, r/m Move if above or equal (CF=0) P6
CMOVB 0F 42 /r r, r/m Move if below (CF=1) P6
CMOVC 0F 42 /r r, r/m Move if below (CF=1) P6
CMOVNAE 0F 42 /r r, r/m Move if below (CF=1) P6
CMOVBE 0F 46 /r r, r/m Move if below or equal (CF=1 or ZF=1) P6
CMOVNA 0F 46 /r r, r/m Move if below or equal (CF=1 or ZF=1) P6
CMOVE 0F 44 /r r, r/m Move if equal (ZF=1) P6
CMOVZ 0F 44 /r r, r/m Move if equal (ZF=1) P6
CMOVG 0F 4F /r r, r/m Move if greater (ZF=0 and SF=OF) P6
CMOVNLE 0F 4F /r r, r/m Move if greater (ZF=0 and SF=OF) P6
CMOVGE 0F 4D /r r, r/m Move if greater or equal (SF=OF) P6
CMOVNL 0F 4D /r r, r/m Move if greater or equal (SF=OF) P6
CMOVL 0F 4C /r r, r/m Move if less (SF<>OF) P6
CMOVNGE 0F 4C /r r, r/m Move if less (SF<>OF) P6
CMOVLE 0F 4E /r r, r/m Move if less or equal (ZF=1 or SF<>OF) P6
CMOVNG 0F 4E /r r, r/m Move if less or equal (ZF=1 or SF<>OF) P6
CMOVNE 0F 45 /r r, r/m Move if not equal (ZF=0) P6
CMOVNZ 0F 45 /r r, r/m Move if not equal (ZF=0) P6
CMOVNO 0F 41 /r r, r/m Move if not overflow (OF=0) P6
CMOVNP 0F 4B /r r, r/m Move if parity odd (PF=0) P6
CMOVPO 0F 4B /r r, r/m Move if parity odd (PF=0) P6
CMOVNS 0F 49 /r r, r/m Move if not sign (SF=0) P6
CMOVO 0F 40 /r r, r/m Move if overflow (OF=1) P6
CMOVP 0F 4A /r r, r/m Move if parity even (PF=1) P6
CMOVPE 0F 4A /r r, r/m Move if parity even (PF=1) P6
CMOVS 0F 48 /r r, r/m Move if sign (SF=1) P6
CMP 3C ib AL, imm8 Compare two integers. 86
CMP 3D iv eAX, imm Compare two integers. 86/386
CMP 81 /7 iv r/m, imm Compare two integers. 86/386
CMP 83 /7 ib r/m16, imm8 Compare two integers. 86/386
CMP 39 /r r/m, r Compare two integers. 86/386
CMP 80 /7 ib r/m8, imm8 Compare two integers. 86
CMP 82 /7 ib r/m8, imm8 Compare two integers. 86
CMP 38 /r r/m8, r8 Compare two integers. 86
CMP 3B /r r, r/m Compare two integers. 86/386
CMP 3A /r r8, r/m8 Compare two integers. 86
CMPEQPD 66 0F C2 /r 00 xmm1, xmm2/m128 Compare packed dble-prec. floats for equality. SSE2
CMPEQPS 0F C2 /r 00 xmm1, xmm2/m128 Compare packed sngle-prec. floats for equality. SSE
CMPEQSD F2 0F C2 /r 00 xmm1, xmm2/m64 Compare scalar dble-prec. floats for equality. SSE2
CMPEQSS F3 0F C2 /r 00 xmm1, xmm2/m32 Compare scalar sngle-prec. floats for equality. SSE
CMPLEPD 66 0F C2 /r 02 xmm1, xmm2/m128 Compare packed dble-prec. floats for less-than-or-equal. SSE2
CMPLEPS 0F C2 /r 02 xmm1, xmm2/m128 Compare packed sngle-prec. floats for less-than-or-equal. SSE
CMPLESD F2 0F C2 /r 02 xmm1, xmm2/m64 Compare scalar dble-prec. floats for less-than-or-equal. SSE2
CMPLESS F3 0F C2 /r 02 xmm1, xmm2/m32 Compare scalar sngle-prec. floats for less-than-or-equal. SSE
CMPLTPD 66 0F C2 /r 01 xmm1, xmm2/m128 Compare packed dble-prec. floats for less-than. SSE2
CMPLTPS 0F C2 /r 01 xmm1, xmm2/m128 Compare packed sngle-prec. floats for less-than. SSE
CMPLTSD F2 0F C2 /r 01 xmm1, xmm2/m64 Compare scalar dble-prec. floats for less-than. SSE2
CMPLTSS F3 0F C2 /r 01 xmm1, xmm2/m32 Compare scalar sngle-prec. floats for less-than. SSE
CMPNEQPD 66 0F C2 /r 04 xmm1, xmm2/m128 Compare packed dble-prec. floats for not-equal. SSE2
CMPNEQPS 0F C2 /r 04 xmm1, xmm2/m128 Compare packed sngle-prec. floats for not-equal. SSE
CMPNEQSD F2 0F C2 /r 04 xmm1, xmm2/m64 Compare scalar dble-prec. floats for not-equal. SSE2
CMPNEQSS F3 0F C2 /r 04 xmm1, xmm2/m32 Compare scalar sngle-prec. floats for not-equal. SSE
CMPNLEPD 66 0F C2 /r 06 xmm1, xmm2/m128 Compare packed dble-prec. floats for not-greater-than. SSE2
CMPNLEPS 0F C2 /r 06 xmm1, xmm2/m128 Compare packed sngle-prec. floats for not-greater-than. SSE
CMPNLESD F2 0F C2 /r 06 xmm1, xmm2/m64 Compare scalar dble-prec. floats for not-greater-than. SSE2
CMPNLESS F3 0F C2 /r 06 xmm1, xmm2/m32 Compare scalar sngle-prec. floats for not-greater-than. SSE
CMPNLTPD 66 0F C2 /r 05 xmm1, xmm2/m128 Compare packed dble-prec. floats for not-less-than. SSE2
CMPNLTPS 0F C2 /r 05 xmm1, xmm2/m128 Compare packed sngle-prec. floats for not-less-than. SSE
CMPNLTSD F2 0F C2 /r 05 xmm1, xmm2/m64 Compare scalar dble-prec. floats for not-less-than. SSE2
CMPNLTSS F3 0F C2 /r 05 xmm1, xmm2/m32 Compare scalar sngle-prec. floats for not-less-than. SSE
CMPORDPD 66 0F C2 /r 07 xmm1, xmm2/m128 Compare packed dble-prec. floats for being ordered. SSE2
CMPORDPS 0F C2 /r 07 xmm1, xmm2/m128 Compare packed sngle-prec. floats for being ordered. SSE
CMPORDSD F2 0F C2 /r 07 xmm1, xmm2/m64 Compare scalar dble-prec. floats for being ordered. SSE2
CMPORDSS F3 0F C2 /r 07 xmm1, xmm2/m32 Compare scalar sngle-prec. floats for being ordered. SSE
CMPPD 66 0F C2 /r ib xmm1, xmm2/m64, imm8Compare packed dble-prec. floats. SSE2
CMPPS 0F C2 /r ib xmm1, xmm2/m32, imm8Compare packed sngle-prec. floats. SSE
CMPSB A6 n/a Compare string bytes. 86
CMPSD F2 0F C2 /r ib xmm1, xmm2/m64, imm8Compare scalar dble-prec. floats. SSE2
CMPSS F3 0F C2 /r ib xmm1, xmm2/m32, imm8Compare scalar sngle-prec. floats. SSE
CMPSW A7 n/a Compare string words. 86/386
CMPSD A7 n/a Compare string DWs. 86/386
CMPUNORDPD 66 0F C2 /r 03 xmm1, xmm2/m128 Compare packed dble-prec. floats for being ordered. SSE2
CMPUNORDPS 0F C2 /r 03 xmm1, xmm2/m128 Compare packed sngle-prec. floats for being unordered. SSE
CMPUNORDSD F2 0F C2 /r 03 xmm1, xmm2/m64 Compare scalar dble-prec. floats for being unordered. SSE2
CMPUNORDSS F3 0F C2 /r 03 xmm1, xmm2/m32 Compare scalar sngle-prec. floats for being unordered. SSE
CMPXCHG 0F B1/r r/m, r Compare and exchange. P5
CMPXCHG 0F B0/r r/m8, r8 Compare and exchange. P5
CMPXCHG486 0F A7 /r r/m, r Undocumented alias to CMPXCHG on some old 486s. 486, UNDOC
CMPXCHG486 0F A6 /r r/m8, r8 Undocumented alias to CMPXCHG on some old 486s. 486, UNDOC
CMPXCHG8B 0F C7 /mem|1 m64 Compare and exchange 8 bytes. P5
COMISD 66 0F 2F /r xmm1, xmm2/m64 Compare scalar ordered dble-prec. floats. SSE2
COMISS 0F 2F /r xmm1, xmm2/m32 Compare scalar ordered sngle-prec. floats. SSE
CPUID 0F A2 n/a CPU identification. P5
CVTDQ2PD F3 0F E6 /r xmm1, xmm2/m64 Convert 2 packed signed DWs to 2 packed dble-prec. floats. SSE2
CVTDQ2PS 0F 5B /r xmm1, xmm2/m128 Convert 4 packed signed DWs to 4 packed sngle-prec. floats. SSE2
CVTPD2DQ F2 0F E6 xmm1, xmm2/m128 Convert 2 packed dble-prec. floats to 2 packed signed DWs. SSE2
CVTPD2PI 66 0F 2D /r mm, xmm/m128 Convert 2 packed dble-prec. floats to 2 packed signed DWs. SSE2
CVTPD2PS 66 0F 5A /r xmm1, xmm2/m128 Convert 2 packed dble-prec. floats to 2 packed sngle-prec. floats.SSE2
CVTPI2PD 66 0F 2A /r xmm, mm/m64 Convert 2 packed signed DWs to 2 packed dble-prec. floats. sse2
CVTPI2PS 0F 2A /r xmm, mm/m64 Convert 2 signed DWs to two sngle-prec. floats. SSE
CVTPS2DQ 66 0F 5B /r xmm1, xmm2/m128 Convert 4 packed sngle-prec. floats to 4 packed signed DWs. sse2
CVTPS2PD 0F 5A /r xmm1, xmm2/m64 Convert 2 packed sngle-prec. floats to 2 packed dble-prec. floats.SSE2
CVTPS2PI 0F 2D /r mm, xmm/m64 Convert 2 packed sngle-prec. floats to 2 packed signed DWs. SSE
CVTSD2SI F2 0F 2D /r r32, xmm/m64 Convert 1 dble-prec. float to 1 signed DW. SSE2
CVTSD2SS F2 0F 5A /r xmm1, xmm2/m64 Convert 1 dble-prec. float to 1 sngle-prec. float. SSE
CVTSI2SD F2 0F 2A /r xmm, r/m32 Convert 1 signed DW to 1 dble-prec. float. SSE2
CVTSI2SS F3 0F 2A /r xmm, r/m32 Convert 1 signed DW to 1 sngle-prec. float. SSE
CVTSS2SD F3 0F 5A /r xmm1, xmm2/m32 Convert 1 sngle-prec. float to 1 dble-prec. float. SSE2
CVTSS2SI F3 0F 2D /r r32, xmm/m32 Convert 1 sngle-prec. float to 1 signed DW. SSE
CVTTPD2DQ 66 0F E6 xmm1, xmm2/m128 Truncate 2 packed dble-prec. floats to 2 packed signed DWs. SSE2
CVTTPD2PI 66 0F 2C /r mm, xmm/m128 Truncate 2 packed dble-prec. floats to 2 packed signed DWs. SSE2
CVTTPS2DQ F3 0F 5B /r xmm1, xmm2/m128 Truncate 4 packed sngle-prec. floats to 4 packed signed DWs. SSE2
CVTTPS2PI 0F 2C /r mm, xmm/m64 Truncate 2 packed sngle-prec. floats to 2 signed packed DWs. SSE
CVTTSD2SI F2 0F 2C /r r32, xmm/m64 Truncate 1 dble-prec. float to 1 signed DW. SSE2
CVTTSS2SI F3 0F 2C /r r32, xmm/m32 Convert 1 sngle-prec. float to 1 signed DW. SSE
CWD 99 n/a Sign-extend AX into DX:AX (or EAX into EDX:EAX). 86/386
CDQ 99 n/a Sign-extend AX into DX:AX (or EAX into EDX:EAX). 86/386
DAA 27 n/a Decimal adjust AL after addition 86
DAS 2F n/a Decimal adjust AL after subtraction 86
DEC 48 eAX Decrement integer by 1 86/386
DEC 4D eBP Decrement integer by 1 86/386
DEC 4B eBX Decrement integer by 1 86/386
DEC 49 eCX Decrement integer by 1 86/386
DEC 4F eDI Decrement integer by 1 86/386
DEC 4A eDX Decrement integer by 1 86/386
DEC 4E eSI Decrement integer by 1 86/386
DEC 4C eSP Decrement integer by 1 86/386
DEC FE /1 r/m8 Decrement integer by 1 86
DEC FF /1 r/m Decrement integer by 1 86/386
DIV F7 /6 r/m Unsigned divide eDX:eAX by the operand. 86/386
DIV F6 /6 r/m8 Unsigned divide AX by the operand. 86
DIVPD 66 0F 5E /r xmm1, xmm2/m128 Divide packed dble-prec. floats. SSE2
DIVPS 0F 5E /r xmm1, xmm2/m128 Divide packed sngle-prec. floats. SSE
DIVSD F2 0F 5E /r xmm1, xmm2/m64 Divide scalar dble-prec. floats. SSE2
DIVSS F3 0F 5E /r xmm1, xmm2/m32 Divide scalar sngle-prec. floats. SSE
EMMS 0F 77 n/a Empty MMX state. MMX
ENTER C8 iw ib imm16, imm8 Create a stack frame for a procedure or subroutine. 186
F2XM1 D9 F0 n/a Compute 2 to the power of ST(0) ' 1. 86,FPU
FABS D9 E1 n/a Absolute value of ST(0). 86,FPU
FADD D8 /0 m32 Add sngle-prec. float to ST(0). 86,FPU
FADD DC /0 m64 Add dble-prec. float to ST(0). 86,FPU
FADD D8 C0+i ST(0), ST(i) Add ST(i) to ST(0). 86,FPU
FADD DC C0+i ST(i), ST(0) Add ST(0) to ST(i). 86,FPU
FADDP DE C0+i ST(i), ST(0) Add ST(0) to ST(i) and pop the FPU stack. 86,FPU
FBLD DF /4 m80 Push BCD value onto the FPU stack. 86,FPU
FBSTP DF /6 m80 Store ST(0) as BCD value and pop FPU stack. 86,FPU
FCHS D9 E0 n/a Change sign of ST(0). 86,FPU
FCLEX 9B DB E2 n/a Clear FPU exception flags and wait. 86,FPU
FCMOVB DA C0+i ST(0), ST(i) FPU move if below (CF=1) 86,FPU
FCMOVBE DA D0+i ST(0), ST(i) FPU move if below or equal (CF=1 or ZF=1) 86,FPU
FCMOVE DA C8+i ST(0), ST(i) FPU move if equal (ZF=1) 86,FPU
FCMOVNB DB C0+i ST(0), ST(i) FPU move if not below (CF=0) 86,FPU
FCMOVNBE DB D0+i ST(0), ST(i) FPU move if not below or equal (CF=0 and ZF=0) 86,FPU
FCMOVNE DB C8+i ST(0), ST(i) FPU move if not equal (ZF=0) 86,FPU
FCMOVNU DB D8+i ST(0), ST(i) FPU move if not unordered (PF=0) 86,FPU
FCMOVU DA D8+i ST(0), ST(i) FPU move if unordered (PF=1) 86,FPU
FCOM D8 /2 m32 Compare ST(0) with sngle-prec. float. 86,FPU
FCOM DC /2 m64 Compare ST(0) with dble-prec. float. 86,FPU
FCOM D8 D0+i ST(i) Compare ST(0) ST(i). 86,FPU
FCOM2 DC D0+i ST(i) Undocumented alias to FCOM ST(i). 86,FPU,UNDOC
FCOMI DB F0+i ST(0), ST(i) Compare ST(0) with ST(i) and set CPU flags. 86,FPU
FCOMIP DF F0+i ST(0), ST(i) Compare ST(0) with ST(i), set CPU flags and pop FPU stack. 86,FPU
FCOMP D8 /3 m32 Compare ST(0) with sngle-prec. float and pop FPU stack. 86,FPU
FCOMP DC /3 m64 Compare ST(0) with dble-prec. float and pop FPU stack. 86,FPU
FCOMP D8 D8+i ST(i) Compare ST(0) with ST(i) and pop FPU stack. 86,FPU
FCOMP3 DC D8+i ST(i) Undocumented alias to FCOMP ST(i). 86,FPU,UNDOC
FCOMP5 DE D0+i ST(i) Undocumented alias to FCOMP ST(i). 86,FPU,UNDOC
FCOMPP DE D9 n/a Compare ST(0) with ST(1) and pop FPU stack twice. 86,FPU
FCOS D9 FF n/a Replace ST(0) with its cosine 386,FPU
FDECSTP D9 F6 n/a Decrement FPU stack pointer. 86,FPU
FDISI 9B DB E1 n/a Disable FPU interrupts and wait. 86,FPU
FDIV D8 /6 m32 Divide ST(0) by sngle-prec. float. 86,FPU
FDIV DC /6 m64 Divide ST(0) by dble-prec. float. 86,FPU
FDIV D8 F0+i ST(0), ST(i) Divide ST(0) by ST(i). 86,FPU
FDIV DC F8+i ST(i), ST(0) Divide ST(i) by ST(0). 86,FPU
FDIVP DE F8+i ST(i), ST(0) Divide ST(i) by ST(0) and pop the FPU stack 86,FPU
FDIVR D8 /7 m32 Divide sngle-prec. float. 86,FPU
FDIVR DC /7 m64 Divide dble-prec. float. 86,FPU
FDIVR D8 F8+i ST(0), ST(i) Divide ST(i) by ST(0). 86,FPU
FDIVR DC F0+i ST(i), ST(0) Divide ST(0) by ST(i). 86,FPU
FDIVRP DE F0+i ST(i), ST(0) Divide ST(0) by ST(i) and pop the FPU stack. 86,FPU
FEMMS 0F 0E n/a Fast empty MMX state. 3DNOW
FENI 9B DB E0 n/a Enable FPU interrupts and wait. 86,FPU
FFREE DD C0+i ST(i) Mark ST(i) as being empty. 86,FPU
FFREEP DF C0+i ST(i) Mark ST(i) as being empty and pop FPU stack. 286,FPU,UNDOC
FIADD DE /0 m16 Add integer word to ST(0). 86,FPU
FIADD DA /0 m32 Add integer DW to ST(0). 86,FPU
FICOM DE /2 m16 Compare ST(0) with word. 86,FPU
FICOM DA /2 m32 Compare ST(0) with DW. 86,FPU
FICOMP DE /3 m16 Compare ST(0) with word and pop FPU stack. 86,FPU
FICOMP DA /3 m32 Compare ST(0) with DW and pop FPU stack. 86,FPU
FIDIV DE /6 m16 Divide ST(0) with word. 86,FPU
FIDIV DA /6 m32 Divide ST(0) with DW. 86,FPU
FIDIVR DE /7 m16 Divide word by ST(0). 86,FPU
FIDIVR DA /7 m32 Divide DW by ST(0). 86,FPU
FILD DF /0 m16 Push word onto the FPU stack. 86,FPU
FILD DB /0 m32 Push DW onto the FPU stack. 86,FPU
FILD DF /5 m64 Push qword onto the FPU stack. 86,FPU
FIMUL DE /1 m16 Multiply ST(0) by word. 86,FPU
FIMUL DA /1 m32 Multiply ST(0) by DW. 86,FPU
FINCSTP D9 F7 n/a Increment FPU stack pointer. 86,FPU
FINIT 9B DB E3 n/a Initialize FPU and wait. 86,FPU
FIST DF /2 m16 Store ST(0) as word. 86,FPU
FIST DB /2 m32 Store ST(0) as DW. 86,FPU
FISTP DF /3 m16 Store ST(0) as word and pop FPU stack. 86,FPU
FISTP DB /3 m32 Store ST(0) as DW and pop FPU stack. 86,FPU
FISTP DF /7 m64 Store ST(0) as qword and pop FPU stack. 86,FPU
FISTTP DF /1 m16 Store ST(0) as word with truncation and pop FPU stack. SSE3
FISTTP DB /1 m32 Store ST(0) as DW with truncation and pop FPU stack. SSE3
FISTTP DD /1 m64 Store ST(0) as qword with truncation and pop FPU stack. SSE3
FISUB DE /4 m16 Subtract word from ST(0). 86,FPU
FISUB DA /4 m32 Subtract DWt from ST(0). 86,FPU
FISUBR DE /5 m16 Subtract ST(0) from word. 86,FPU
FISUBR DA /5 m32 Subtract ST(0) from DW. 86,FPU
FLD D9 /0 m32 Push sngle-prec. float onto the FPU stack. 86,FPU
FLD DD /0 m64 Push dble-prec. float onto the FPU stack. 86,FPU
FLD DB /5 m80 Push 80-bit float onto the FPU stack. 86,FPU
FLD D9 C0+i ST(i) Push ST(i) onto the FPU stack. 86,FPU
FLD1 D9 E8 n/a Push +1.0 onto the FPU stack. 86,FPU
FLDCW D9 /5 m16 Load source into FPU control word. 86,FPU
FLDENV D9 /4 mem Load FPU environment. 86,FPU
FLDL2E D9 EA n/a Push log2(e) onto the FPU stack. 86,FPU
FLDLG2 D9 EC n/a Push log10(2) onto the FPU stack. 86,FPU
FLDLN2 D9 ED n/a Push ln(2) onto the FPU stack. 86,FPU
FLDPI D9 EB n/a Push pi onto the FPU stack. 86,FPU
FLDZ D9 EE n/a Push +0.0 onto the FPU stack. 86,FPU
FMUL D8 /1 m32 Multiply ST(0) by sngle-prec. float. 86,FPU
FMUL DC /1 m64 Multiply ST(0) by dble-prec. float. 86,FPU
FMUL D8 C8+i ST(0), ST(i) Multiply ST(0) by ST(i). 86,FPU
FMUL DC C8+i ST(i), ST(0) Multiply ST(i) by ST(0). 86,FPU
FMULP DE C8+i ST(i), ST(0) Multiply ST(i) by ST(0) and pop the FPU stack. 86,FPU
FNCLEX DB E2 n/a Clear FPU exception flags. 86,FPU
FNDISI DB E1 n/a Disable FPU interrupts. 86,FPU
FNENI DB E0 n/a Enable FPU interrupts. 86,FPU
FNINIT DB E3 n/a Initialize FPU. 86,FPU
FNOP D9 D0 n/a FPU no operation is performed. 86,FPU
FNSAVE DD /6 mem Save FPU state. 86,FPU
FNSTCW D9 /7 m16 Store FPU control word in memory. 86,FPU
FNSTDW D9 /7 AX Store device word into AX (only on i387SL Mobile). 386,FPU,UNDOC
FNSTENV D9 /6 mem Store FPU environment. 86,FPU
FNSTSG DF E2 AX Store signature word into AX (only on i387SL Mobile). 386,FPU,UNDOC
FNSTSW DF E0 AX Store FPU status word into AX. 286,FPU
FNSTSW DD /7 m16 Store FPU status word into memory. 86,FPU
FPATAN D9 F3 n/a Put arctan(ST(1)/ST(0)) to ST(1) and pop the FPU stack. 86,FPU
FPREM D9 F8 n/a Partial remainder rounded towards 0. 86,FPU
FPREM1 D9 F5 n/a Partial remainder rounded to the nearest integer. 386,FPU
FPTAN D9 F2 n/a Put tan(ST(0)) to ST(0) and push 1 onto FPU stack. 86,FPU
FRICHOP DD FC n/a Round ST(0) towards zero (only on Cyrix and 486s). 486,FPU,CYRIX
FRINEAR DF FC n/a Round ST(0) to nearest integer (only on Cyrix and 486s). 486,FPU,CYRIX
FRINT2 DB FC n/a Round ST(0) to integer (only on Cyrix and 486s). 486,FPU,CYRIX
FRNDINT D9 FC n/a Round ST(0) to an integer. 86,FPU
FRSTOR DD /4 mem Restore FPU state. 86,FPU
FSAVE 9B DD /6 mem Save FPU state and wait. 86,FPU
FSCALE D9 FD n/a Scale ST(0) by ST(1). 86,FPU
FSETPM DB E4 n/a Set protected mode (only on 286s). 286,FPU,PRIV
FSIN D9 FE n/a Replace ST(0) with its sine. 386,FPU
FSINCOS D9 FB n/a Compute the sine and cosine of ST(0). 386,FPU
FSQRT D9 FA n/a Replace ST(0) with its sq. root. 86,FPU
FST D9 /2 m32 Copy ST(0) to sngle-prec. float. 86,FPU
FST DD /2 m64 Copy ST(0) to dble-prec. float. 86,FPU
FST DD D0+i ST(i) Copy ST(0) to ST(i) 86,FPU
FSTP D9 /3 m32 Copy ST(0) to sngle-prec. float and pop FPU stack 86,FPU
FSTP DD /3 m64 Copy ST(0) to dble-prec. float and pop FPU stack 86,FPU
FSTP DB /7 m80 Copy ST(0) to 80-bit float and pop FPU stack 86,FPU
FSTP DD D8+i ST(i) Copy ST(0) to ST(i) and pop FPU stack 86,FPU
FSTP1 D9 D8+i ST(i) Undocumented alias to FSTP ST(i) 86,FPU,UNDOC
FSTP8 DF D0+i ST(i) Undocumented alias to FSTP ST(i) 86,FPU,UNDOC
FSTP9 DF D8+i ST(i) Undocumented alias to FSTP ST(i) 86,FPU,UNDOC
FSTSW 9B DF E0 AX Store FPU status word into AX and wait. 286,FPU
FSTSW 9B DD /7 mem Store FPU status word into memory and wait. 86,FPU
FSUB D8 /4 m32 Subtract sngle-prec. float from ST(0). 86,FPU
FSUB DC /4 m64 Subtract dble-prec. float from ST(0). 86,FPU
FSUB D8 E0+i ST(0), ST(i) Subtract ST(i) from ST(0). 86,FPU
FSUB DC E8+i ST(i), ST(0) Subtract ST(0) from ST(i). 86,FPU
FSUBP DE E8+i ST(i), ST(0) Subtract ST(0) from ST(i) and pop FPU stack. 86,FPU
FSUBR D8 /5 m32 Subtract ST(0) from sngle-prec. float. 86,FPU
FSUBR DC /5 m64 Subtract ST(0) from dble-prec. float. 86,FPU
FSUBP DE E9 n/a Subtract ST(0) from ST(1) and pop FPU stack. 86,FPU
FSUBR D8 E8+i ST(0), ST(i) Subtract ST(0) from ST(i). 86,FPU
FSUBR DC E0+i ST(i), ST(0) Subtract ST(i) from ST(0). 86,FPU
FSUBRP DE E0+i ST(i), ST(0) Subtract ST(i) from ST(0) and pop FPU stack. 86,FPU
FSUBRP DE E1 n/a Subtract ST(1) from ST(0) and pop FPU stack. 86,FPU
FTST D9 E4 n/a Compare ST(0) with 0.0. 86,FPU
FUCOM DD E0+i ST(i) Unordered compare ST(0) with ST(i). 386,FPU
FUCOMI DB E8+i ST, ST(i) Unordered compare ST(0) with ST(i) and set CPU flags. P6,FPU
FUCOMIP DF E8+i ST, ST(i) Unordered compare ST(0) with ST(i), set flags + pop stack. P6,FPU
FUCOMP DD E8+i ST(i) Unordered compare ST(0) with ST(i) and pop FPU stack. 386,FPU
FUCOMPP DA E9 n/a Unordered compare ST(0) with ST(1) + pop FPU stack twice. 386,FPU
FXAM D9 E5 n/a Examine classi of value in ST(0). 86,FPU
FXCH D9 C8+i ST(i) Exchange the contents of ST(0) and ST(i). 86,FPU
FXCH4 DD C8+i ST(i) Undocumented alias to FXCH ST(i). 86,FPU,UNDOC
FXCH7 DF C8+i ST(i) Undocumented alias to FXCH ST(i). 86,FPU,UNDOC
FXRSTOR 0F AE /mem|1 mem Restore FP, MMX, SSE and SSE2 state. P6,FPU,SSE
FXSAVE 0F AE /mem|0 mem Save FP, MMX, SSE and SSE2 state. P6,FPU,SSE
FXTRACT D9 F4 n/a Extract exponent and significand from ST(0). 86,FPU
FYL2X D9 F1 n/a Set ST(1) to ST(1) * log2(ST(0)) and pop FPU stack. 86,FPU
FYL2XP1 D9 F9 n/a Set ST(1) to ST(1) * log2(ST(0)+1) and pop FPU stack. 86,FPU
HADDPD 66 0F 7C /r xmm1, xmm2/m128 Add horizontally packed dble-prec. floats. SSE3
HADDPS F2 0F 7C /r xmm1, xmm2/m128 Add horizontally packed sngle-prec. floats. SSE3
HLT F4 n/a Halt the processor. 86
HSUBPD 66 0F 7D /r xmm1, xmm2/m128 Subtract horizontally packed dble-prec. floats. SSE3
HSUBPS F2 0F 7D /r xmm1, xmm2/m128 Subtract horizontally packed sngle-prec. floats. SSE3
IBTS 0F A7 /r r/m,r Write bits from reg to r/m (only on the old 386s). 386,UNDOC
ICEBP F1 n/a One-byte form of INT 1. P6,UNDOC
IDIV F7 /7 r/m Signed divide eDX:eAX by the operand. 86/386
IDIV F6 /7 r/m8 Signed divide AX by the operand. 86
IMUL F7 /5 r/m Signed multiply operand by eAX. 86/386
IMUL F6 /5 r/m8 Signed multiply operand by AL. 86
IMUL 69 /r iv r, r/m, imm Signed multiplation of two integers. 286
IMUL 6B /r ib r, r/m, imm8 Signed multiplation of two integers. 286
IMUL 0F AF /r r, r/m Signed multiplation of two integers. 286
IN EC AL, DX Input AL from I/O port. 86
IN E4 ib AL, imm8 Input AL from I/O port. 86
IN ED eAX, DX Input eAX from I/O port. 86/386
IN E5 ib eAX, imm8 Input eAX from I/O port. 86/386
INC 40 eAX Increment integer by 1. 86/386
INC 45 eBP Increment integer by 1. 86/386
INC 43 eBX Increment integer by 1. 86/386
INC 41 eCX Increment integer by 1. 86/386
INC 47 eDI Increment integer by 1. 86/386
INC 42 eDX Increment integer by 1. 86/386
INC 46 eSI Increment integer by 1. 86/386
INC 44 eSP Increment integer by 1. 86/386
INC FF /0 r/m Increment integer by 1. 86/386
INC FE /0 r/m8 Increment r/m byte by 1 86
INSB 6C n/a Input string byte from I/O port. 186
INSW 6D m8, DX Input string byte from I/O port. 186/386
INSD 6D m8, DX Input string byte from I/O port. 186/386
INT CC 3 One byte form of INT 3. 86
INT CD ib imm8 Software interrupt. 86
INTO CE n/a Interrupt 4, if OF=1. 86
INVD 0F 08 n/a Invalidate CPU internal caches. 486,PRIV
INVLPG 0F 01/7 m Invalidate TLB entry. 486,PRIV
IRET CF n/a Return from Interrupt. 86
IRETD CF n/a Return from Interrupt. 86
JA 0F 87 iv rel Jump if above (CF=0 and ZF=0) 86
JNBE 0F 87 iv rel Jump if above (CF=0 and ZF=0) 86
JA 77 cb rel8 Jump short if above (CF=0 and ZF=0) 386
JNBE 77 cb rel8 Jump short if above (CF=0 and ZF=0) 386
JAE 0F 83 iv rel Jump if above or equal (CF=0) 86
JNB 0F 83 iv rel Jump if above or equal (CF=0) 86
JNC 0F 83 iv rel Jump if above or equal (CF=0) 86
JAE 73 cb rel8 Jump short if above or equal (CF=0) 386
JNB 73 cb rel8 Jump short if above or equal (CF=0) 386
JNC 73 cb rel8 Jump short if above or equal (CF=0) 386
JB 0F 82 cw/cd rel Jump if below (CF=1) 386
JC 0F 82 cw/cd rel Jump if below (CF=1) 386
JNAE 0F 82 cw/cd rel Jump if below (CF=1) 386
JB 72 cb rel8 Jump short if below (CF=1) 86
JC 72 cb rel8 Jump short if below (CF=1) 86
JNAE 72 cb rel8 Jump short if below (CF=1) 86
JBE 0F 86 cw/cd rel Jump if below or equal (CF=1 or ZF=1). 386
JNA 0F 86 cw/cd rel Jump if below or equal (CF=1 or ZF=1). 386
JBE 76 cb rel8 Jump short if below or equal (CF=1 or ZF=1). 86
JNA 76 cb rel8 Jump short if below or equal (CF=1 or ZF=1). 86
JCXZ E3 cb rel8 Jump short if eCX is 0. 86/386
JECXZ E3 cb rel8 Jump short if eCX is 0. 86/386
JE 0F 84 iv rel Jump if equal (ZF=1). 386
JZ 0F 84 iv rel Jump if equal (ZF=1). 386
JE 74 ib rel8 Jump short if equal (ZF=1). 86
JZ 74 ib rel8 Jump short if equal (ZF=1). 86
JG 0F 8F iv rel Jump if greater (ZF=0 and SF=OF) 386
JNLE 0F 8F iv rel Jump if greater (ZF=0 and SF=OF) 386
JG 7F cb rel8 Jump short if greater (ZF=0 and SF=OF) 86
JNLE 7F cb rel8 Jump short if greater (ZF=0 and SF=OF) 86
JGE 0F 8D iv rel Jump near if greater or equal (SF=OF) 386
JNL 0F 8D iv rel Jump near if greater or equal (SF=OF) 386
JGE 7D cb rel8 Jump short if greater or equal (SF=OF) 86
JNL 7D cb rel8 Jump short if greater or equal (SF=OF) 86
JL 0F 8C cw/cd rel Jump if less (SF<>OF) 386
JNGE 0F 8C cw/cd rel Jump if less (SF<>OF) 386
JL 7C cb rel8 Jump short if less (SF<>OF) 86
JNGE 7C cb rel8 Jump short if less (SF<>OF) 86
JLE 0F 8E cw/cd rel Jump if less or equal (ZF=1 or SF<>OF) 386
JNG 0F 8E cw/cd rel Jump if less or equal (ZF=1 or SF<>OF) 386
JLE 7E cb rel8 Jump short if less or equal (ZF=1 or SF<>OF) 86
JNG 7E cb rel8 Jump short if less or equal (ZF=1 or SF<>OF) 86
JMP EA iv iw imm16:imm a far absolute jump. 86
JMP FF /5 m16:m a far absolute indirect jump. 86
JMP FF /4 r/m A near absolute indirect jump. 86/386
JMP E9 iv rel A near relative jump. 86
JMP EB ib rel8 A short relative jump. 86
JMPE 0F 00 /6 r/m Transition from IA-32 mode to IA-64 mode. ITANIUM
JMPE 0F B8 iv rel Transition from IA-32 mode to IA-64 mode. ITANIUM
JNE 0F 85 cw/cd rel Jump if not equal (ZF=0) 386
JNZ 0F 85 cw/cd rel Jump if not equal (ZF=0) 386
JNE 75 ib rel8 Jump short if not equal (ZF=0) 86
JNZ 75 ib rel8 Jump short if not equal (ZF=0) 86
JNO 0F 81 iv rel Jump if not overflow (OF=0) 386
JNO 71 ib rel8 Jump short if not overflow (OF=0). 86
JNP 0F 8B iv rel Jump if not parity (PF=0). 386
JPO 0F 8B iv rel Jump if not parity (PF=0). 386
JNP 7B ib rel8 Jump short if not parity (PF=0). 86
JPO 7B ib rel8 Jump short if not parity (PF=0). 86
JNS 0F 89 iv rel Jump if not sign (SF=0). 386
JNS 79 ib rel8 Jump short if not sign (SF=0). 86
JO 0F 80 iv rel Jump if overflow (OF=1). 386
JO 70 ib rel8 Jump short if overflow (OF=1). 86
JP 0F 8A iv rel Jump if parity (PF=1). 386
JPE 0F 8A iv rel Jump if parity (PF=1). 386
JP 7A ib rel8 Jump short if parity (PF=1). 86
JPE 7A ib rel8 Jump short if parity (PF=1). 86
JS 0F 88 iv rel Jump if sign (SF=1). 386
JS 78 ib rel8 Jump short if sign (SF=1) 86
LAHF 9F n/a Load AH from CPU flags. 86
LAR 0F 02 /r reg, r/m Load access rights of the segment. 286
LDDQU F2 0F F0 /r xmm,m128 Load unaligned dble-prec. qword. SSE3
LDMXCSR 0F AE /mem|2 m32 Load source into MXCSR. SSE
LDS C5 /r reg, m16:mem Load far pointer into DS and register. 86
LEA 8D /r r32, m Load effective address into register. 86/386
LEAVE C9 n/a Destroy stack frame used by procedure or sbroutine. 186
LES C4 /r r1 m16:mem Load far pointer into ES and register. 86
LFENSE 0F AE /3|5 n/a Load fence. SSE2
LFS 0F B4 /r reg, m16:mem Load far pointer into FS and register. 386
LGDT 0F 01 /2 mem Load source into GDTR. 286,PRIV
LGS 0F B5 /r r, m16:mem Load far pointer into GS and register. 386
LIDT 0F 01 /3 mem Load source into IDTR. 286,PRIV
LLDT 0F 00 /2 r/m16 Load source into LDTR. 286,PRIV
LMSW 0F 01 /6 r/m16 Load source into MSW (bottom 4 bits of CR(0). 286,PRIV
LOADALL 0F 07 n/a Load processor state (on some 386 & 486s). 386,UNDOC
LOADALL286 0F 04 n/a Load processor state (only on 286). 286,UNDOC
LOADALL286 0F 05 n/a Load processor state (only on 286). 286,UNDOC
LOCK F0 n/a Exclusive use of memory in multiprocessor system. 86
LODSB AC n/a Load a byte from string. 86
LODSW AD n/a Load a word from string. 86/386
LODSD AD n/a Load a DW from string. 86/386
LOOP E2 ib rel8 Decrement eCX and jump if eCX<>0. 86
LOOPE E1 ib rel8 Decrement eCX and jump if eCX<>0 and ZF=1. 86
LOOPZ E1 ib rel8 Decrement eCX and jump if eCX<>0 and ZF=1. 86
LOOPNE E0 ib rel8 Decrement eCX and jump if eCX<>0 and ZF=0. 86
LOOPNZ E0 ib rel8 Decrement eCX and jump if eCX<>0 and ZF=0. 86
LSL 0F 03 /r reg, r/m Load segment limit. 286
LSS 0F B2 /r reg, m16:mem Load far pointer into SS and register. 386
LTR 0F 00 /3 r/m16 Load source into TR. 286,PRIV
MASKMOVDQU 66 0F F7 /r xmm1, xmm2 Store selected bytes of DW. SSE2
MASKMOVQ 0F F7 /r mm1, mm2 Store selected bytes of qword. SSE
MAXPD 66 0F 5F /r xmm1, xmm2/m128 Maximum of packed dble-prec. floats. SSE2
MAXPS 0F 5F /r xmm1, xmm2/m128 Maximum of packed sngle-prec. floats. SSE
MAXSD F2 0F 5F /r xmm1, xmm2/m64 Maximum of scalar dble-prec. floats. SSE2
MAXSS F3 0F 5F /r xmm1, xmm2/m32 Maximum of scalar sngle-prec. floats. SSE
MFENCE 0F AE /6 n/a Memory fence. SSE2
MINPD 66 0F 5D /r xmm1, xmm2/m128 Minimum of packed dble-prec. floats. SSE2
MINPS 0F 5D /r xmm1, xmm2/m128 Minimum of packed sngle-prec. floats. SSE
MINSD F2 0F 5D /r xmm1, xmm2/m64 Minimum of scalar dble-prec. floats. SSE2
MINSS F3 0F 5D /r xmm1, xmm2/m32 Minimum of scalar sngle-prec. floats. SSE
MONITOR 0F 01 C8 n/a Setup monitor address from EAX. SSE3
MOV AH B4 ib imm8 Move immediate value into register. 86
MOV AL B0 ib imm8 Move immediate value into register. 86
MOV AL A0 ib moffs8 Move source into register. 86
MOV BH B7 ib imm8 Move immediate value into register. 86
MOV BL B3 ib imm8 Move immediate value into register. 86
MOV CH B5 ib imm8 Move immediate value into register. 86
MOV CL B1 ib imm8 Move immediate value into register. 86
MOV CR0 0F 22 /r reg32 Move register into control register. 386/PRIV
MOV CR2 0F 22 /r reg32 Move register into control register. 386/PRIV
MOV CR3 0F 22 /r reg32 Move register into control register. 386/PRIV
MOV CR4 0F 22 /r reg32 Move register into control register. 386/PRIV
MOV DH B6 ib imm8 Move immediate value into register. 86
MOV DL B2 ib imm8 Move immediate value into register. 86
MOV DR0 0F 23 /r reg32 Move register into debug register. 386,PRIV
MOV DR1 0F 23 /r reg32 Move register into debug register. 386,PRIV
MOV DR2 0F 23 /r reg32 Move register into debug register. 386,PRIV
MOV DR3 0F 23 /r reg32 Move register into debug register. 386,PRIV
MOV DR6 0F 23 /r reg32 Move register into debug register. 386,PRIV
MOV DR7 0F 23 /r reg32 Move register into debug register. 386,PRIV
MOV eAX B8 iv imm Move immediate value into register. 86,386
MOV eAX A1 iv moffs Move source into register. 86,386
MOV eBP BD iv imm Move immediate value into register. 86,386
MOV eBX BB iv imm Move immediate value into register. 86,386
MOV eCX B9 iv imm Move immediate value into register. 86,386
MOV eDI BF iv imm Move immediate value into register. 86,386
MOV eDX BA iv imm Move immediate value into register. 86,386
MOV eSI BE iv imm Move immediate value into register. 86,386
MOV eSP BC iv imm Move immediate value into register. 86,386
MOV A3 iv moffs,eAX Move register into destination. 86,386
MOV A2 ib moffs8,AL Move register into destination. 86
MOV C7 /0 iv r/m,imm Move immediate value into register. 86
MOV 89 /r r/m,reg Move register into destination. 86/386
MOV 8C /r r/m, sreg Move segment register into destination. 86
MOV C6 /0 ib r/m8,imm8 Move immediate value into destination. 86
MOV 88 /r r/m8,reg8 Move register into destination. 86
MOV 8B /r reg,r/m Move source into register. 86,386
MOV 0F 20 /r reg32,CR0/2/3/4 Move control register into register. 386
MOV 0F 21 /r reg32,DR0/1/2/3/6/7 Move debug register into register. 386
MOV 0F 24 /r reg32,TR3/4/5/6/7 Move test register into register. 386
MOV 8A /r reg8,r/m8 Move source into register. 86
MOV 8E /r sreg,r/m Move source into segment register. 86
MOV 0F 26 /r TR3/4/5/6/7,reg32 Move register into test register. 386
MOVAPD 66 0F 28 /r xmm1, xmm2/m128 Move aligned packed dble-prec. floats. SSE2
MOVAPD 66 0F 29 /r xmm2/m128, xmm1 Move aligned packed dble-prec. floats. SSE2
MOVAPS 0F 28 /r xmm1,xmm2/m128 Move aligned packed sngle-prec. floats. SSE
MOVAPS 0F 29 /r xmm1/m128,xmm2 Move aligned packed sngle-prec. floats. SSE
MOVD 0F 6E /r mm,r/m32 Move DW to MMX register. MMX
MOVD 0F 7E /r r/m32, mm Move DW from MMX register. MMX
MOVD 66 0F 7E /r r/m32,xmm Move DW to XMM register. SSE2
MOVD 66 0F 6E /r xmm,r/m32 Move DW from XMM register. SSE2
MOVDDUP F2 0F 12 /r xmm1,xmm2/m128 Move packed dble-prec. float and duplicate it. SSE3
MOVDQ2Q F2 0F D6 /r mm,xmm Move DW from XMM to MMX register. SSE2
MOVDQA 66 0F 6F /r xmm1,xmm2/m128 Move aligned double qword. SSE2
MOVDQA 66 0F 7F /r xmm2/m128,xmm1 Move aligned double qword. SSE2
MOVDQU F3 0F 6F /r xmm1,xmm2/m128 Move unaligned double qword. SSE2
MOVDQU F3 0F 7F /r xmm1,m128/xmm2 Move unaligned double qword. SSE2
MOVHLPS OF 12 3| /r xmm1,xmm2 Move packed sngle-prec. floats values from high to low. SSE
MOVHPD 66 0F 17 /r m64,xmm Move high packed dble-prec. floats. SSE2
MOVHPD 66 0F 16 /r xmm,m64 Move high packed dble-prec. floats. SSE2
MOVHPS 0F 17 /r m64,xmm Move high packed sngle-prec. floats. SSE
MOVHPS 0F 16 /mem|r xmm, m64 Move high packed sngle-prec. floats. SSE
MOVLHPS OF 16 3| /r xmm1,xmm2 Move packed sngle-prec. floats from low to high. SSE
MOVLPD 66 0F 13 /r m64,xmm Move low packed dble-prec. floats. SSE2
MOVLPD 66 0F 12 /r xmm,m64 Move low packed dble-prec. floats. SSE2
MOVLPS 0F 13 /r m64,xmm Move low packed dble-prec. floats. SSE
MOVLPS 0F 12 /mem|r xmm,m64 Move low packed sngle-prec. floats. SSE
MOVMSKPD 66 0F 50 /r reg32,xmm Extract packed dble-prec. float sign mask. SSE2
MOVMSKPS 0F 50 /r reg32,xmm Extract packed sngle-prec. float sign mask. SSE
MOVNTDQ 66 0F E7 /r m128,xmm Move dble-prec. qword preventing caching. SSE2
MOVNTI 0F C3 /r m32,reg32 Move DW preventing caching. SSE2
MOVNTPD 66 0F 2B /r m128,xmm Move packed dble-prec. float preventing caching. SSE2
MOVNTPS 0F 2B /r m128,xmm Move packed sngle-prec. float preventing caching. SSE
MOVNTQ 0F E7 /r m64,mm Move qword preventing caching. SSE
MOVQ 0F 6F /r mm1,mm2/m64 Move qword to MMX register. MMX
MOVQ 0F 7F /r mm1/m64,mm2 Move qword from MMX register. MMX
MOVQ F3 0F 7E /r xmm1,xmm2/m64 Move qword to XMM register. SSE2
MOVQ 66 0F D6 /r xmm2/m64,xmm1 Move qword from XMM register. SSE2
MOVQ2DQ F3 0F D6 /r xmm,mm Move qword from MMX to XMM register. SSE2
MOVSB A4 n/a Move abyte from string to string. 86
MOVSD F2 0F 10 /r xmm1,xmm2/m64 Move scalar dble-prec. float. SSE2
MOVSD F2 0F 11 /r xmm2/m64,xmm1 Move scalar dble-prec. float. SSE2
MOVSHDUP F3 0F 16 /r xmm1,xmm2/m128 Move high packed sngle-prec. floats and duplicate them. SSE3
MOVSLDUP F3 0F 12 /r xmm2/m128,xmm1 Move low packed sngle-prec. floats and duplicate them. SSE3
MOVSS F3 0F 10 /r xmm1,xmm2/m64 Move scalar dble-prec. float. SSE
MOVSS F3 0F 11 /r xmm2/m64,xmm1 Move scalar dble-prec. float. SSE
MOVSW A5 n/a Move word from string to string. 86/386
MOVSD A5 n/a Move DW from string to string. 86/386
MOVSX 0F BE /r reg,r/m8 Move byte to word with sign-extension. 386
MOVSX 0F BF /r reg32,r/m16 Move word to doubleword, sign-extension. 386
MOVUPD 66 0F 10 /r xmm1, xmm2/m128 Move unaligned packed dble-prec. floats. SSE2
MOVUPD 66 0F 11 /r xmm2/m128, xmm Move unaligned packed dble-prec. floats. SSE2
MOVUPS 0F 10 /r xmm1,xmm2/m128 Move unaligned packed sngle-prec. floats. SSE
MOVUPS 0F 11 /r xmm2/m128,xmm1 Move unaligned packed sngle-prec. floats. SSE
MOVZX 0F B6 /r reg,r/m8 Move byte to word with zero-extension. 386
MOVZX 0F B7 /r reg32,r/m16 Move word to doubleword with zero-extension. 386
MUL F7 /4 r/m Unsigned multiply operand by eAX. 86/386
MUL F6 /4 r/m8 Unsigned multiply operand by AL. 86
MULPD 66 0F 59 /r xmm1,xmm2/m128 Multiply packed dble-prec. floats. SSE2
MULPS 0F 59 /r xmm1,xmm2/m128 Multiply packed sngle-prec. floats. SSE
MULSD F2 0F 59 /r xmm1,xmm2/m64 Multiply scalar dble-prec. floats. SSE2
MULSS F3 0F 59 /r xmm1,xmm2/m32 Multiply scalar dble-prec. floats. SSE
MWAIT 0F 01 C9 n/a Monitor wait hint. SSE3
NEG F7 /3 r/m Two’s complement negation. 86/386
NEG F6 /3 r/m8 Two’s complement negation. 86
NOP 90 n/a No operation 86
NOT F7 /2 r/m Ones’s complement negation. 86/386
NOT F6 /2 r/m8 Ones’s complement negation. 86
OR 0C ib AL,imm8 Bitwise OR of two integers. 86
OR 0D iv eAX,imm Bitwise OR of two integers. 86/386
OR 81 /1 iv r/m,imm Bitwise OR of two integers. 86/386
OR 83 /1 ib r/m,imm8 Bitwise OR of two integers. 86/386
OR 09 /r r/m,reg Bitwise OR of two integers. 86/386
OR 80 /1 ib r/m8,imm8 Bitwise OR of two integers. 86
OR 82 /1 ib r/m8,imm8 Bitwise OR of two integers. 86
OR 08 /r r/m8,reg8 Bitwise OR of two integers. 86
OR 0B /r reg,r/m Bitwise OR of two integers. 86/386
OR 0A /r reg8,r/m8 Bitwise OR of two integers. 86
ORPD 66 0F 56 /r xmm1, xmm2/m128 Bitwise OR of packed dble-prec. floats. SSE2
ORPS 0F 56 /r xmm1,xmm2/m128 Bitwise OR of packed sngle-prec. floats. SSE
OUT EE DX,AL Output AL to I/O port. 86
OUT EF DX,eAX Output eAX to I/O port. 86,386
OUT E6 ib imm8,AL Output AL to I/O port. 86
OUT E7 ib imm8,eAX Output eAX to I/O port. 86/386
OUTSB 6E n/a Output string byte to I/O port. 186
OUTSW 6F n/a Output string word to I/O port. 186/386
OUTSD 6F n/a Output string DW to I/O port. 186/386
PACKSSDW 0F 6B /r mm1,mm2/m64 Pack DWs to words with signed saturation. MMX
PACKSSDW 66 0F 6B /r xmm1,xmm2/m128 Pack DWs to words with signed saturation. SSE2
PACKSSWB 0F 63 /r mm1,mm2/m64 Pack words to bytes with signed saturation. MMX
PACKSSWB 66 0F 63 /r xmm1,xmm2/m128 Pack words to bytes with signed saturation. SSE2
PACKUSWB 0F 67 /r mm1,mm2/m64 Pack words to bytes with unsigned saturation. MMX
PACKUSWB 66 0F 67 /r xmm1,xmm2/m128 Pack words to bytes with unsigned saturation. SSE2
PADDB 0F FC /r mm1,mm2/m64 Add packed byte integers. MMX
PADDB 66 0F FC /r xmm1,xmm2/m128 Add packed byte integers. SSE2
PADDD 0F FE /r mm1,mm2/m64 Add packed DW integers. MMX
PADDD 66 0F FE /r xmm1,xmm2/m128 Add packed DW integers. SSE2
PADDQ 0F D4 /r mm1,mm2/m64 Add packed qword integers. MMX
PADDQ 66 0F D4 /r xmm1,xmm2/m128 Add packed qword integers. SSE2
PADDSB 0F EC /r mm1,mm2/m64 Add packed byte integers with signed saturation. MMX
PADDSB 66 0F EC /r xmm1,xmm2/m128 Add packed byte integers with signed saturation. SSE2
PADDSIW 0F 51 /r mm,r/m64 Add packed words and store to implicit register. MMX,CYRYX
PADDSW 0F ED /r mm1,mm2/m64 Add packed word integers with signed saturation. MMX
PADDSW 66 0F ED /r xmm1,xmm2/m128 Add packed word integers with signed saturation. SSE2
PADDUSB 0F DC /r mm1,mm2/m64 Add packed byte integers with unsigned saturation. MMX
PADDUSB 66 0F DC /r xmm1,xmm2/m128 Add packed byte integers with unsigned saturation. SSE2
PADDUSW 0F DD /r mm1,mm2/m64 Add packed word integers with unsigned saturation. MMX
PADDUSW 66 0F DD /r xmm1,xmm2/m128 Add packed word integers with unsigned saturation. SSE2
PADDW 0F FD /r mm1,mm2/m64 Add packed word integers. MMX
PADDW 66 0F FD /r xmm1,xmm2/m128 Add packed word integers. SSE2
PAND 0F DB /r mm1,mm2/m64 Bitwise AND of MMX register. MMX
PAND 66 0F DB /r xmm1,xmm2/m128 Bitwise AND of XMM register. SSE2
PANDN 0F DF /r mm1,mm2/m64 Bitwise AND NOT of MMX register. MMX
PANDN 66 0F DF /r xmm1,xmm2/m128 Bitwise AND NOT of XMM register. SSE2
PAUSE F3 90 n/a Hint to processor that improves performance of spin loops. SSE2
PAVEB 0F 50 /r mm, r/m64 Average of 8 packed bytes. MMX,CYRIX
PAVGB 0F E0 /r mm1,mm2/m64 Average of packed byte integers. SSE
PAVGB 66 0F E0 /r xmm1,xmm2/m128 Average of packed byte integers. SSE2
PAVGUSB 0F 0F /r BF mm1,mm2/m64 Average of unsigned packed bytes. 3DNOW
PAVGW 0F E3 /r mm1,mm2/m64 Average of packed word integers. SSE
PAVGW 66 0F E3 /r xmm1,xmm2/m128 Average of packed word integers. SSE2
PCMPEQB 0F 74 /r mm1,mm2/m64 Compare packed bytes for equality. MMX
PCMPEQB 66 0F 74 /r xmm1,xmm2/m128 Compare packed bytes for equality. SSE2
PCMPEQD 0F 76 /r mm1,mm2/m64 Compare packed DWs for equality. MMX
PCMPEQD 66 0F 76 /r xmm1,xmm2/m128 Compare packed DWs for equality. SSE2
PCMPEQW 0F 75 /r mm1,mm2/m64 Compare packed words for equality. MMX
PCMPEQW 66 0F 75 /r xmm1,xmm2/m128 Compare packed words for equality. SSE2
PCMPGTB 0F 64 /r mm1,mm2/m64 Compare packed bytes for greater-than. MMX
PCMPGTB 66 0F 64 /r xmm1, xmm2/m128 Compare packed bytes for greater-than. SSE2
PCMPGTD 0F 66 /r mm1,mm2/m64 Compare packed DWs for greater-than. MMX
PCMPGTD 66 0F 66 /r xmm1,xmm2/m128 Compare packed DWs for greater-than. SSE2
PCMPGTW 0F 65 /r mm1,mm2/m64 Compare packed words for greater-than. MMX
PCMPGTW 66 0F 65 /r xmm1,xmm2/m128 Compare packed words for greater-than. SSE2
PDISTIB 0F 54 /r mm,m64 Packed distance and accumulate with implied register. MMX,CYRIX
PEXTRW 0F C5 /r ib reg32,mm,imm8 Extract the word from MMX register. SSE
PEXTRW 66 0F C5 /r ib reg32,xmm,imm8 Extract the word from XMM register. SSE2
PF2ID 0F 0F /r 1D mm1,mm2/m64 Convert packed sngle-prec. floats to DWs. 3DNOW
PF2IW 0F 0F /r 1C mm1,mm2/m64 Convert packed sngle-prec. floats to words. 3DNOW
PFACC 0F 0F /r AE mm1,mm2/m64 Accumulate packed sngle-prec. floats. 3DNOW
PFADD 0F 0F /r 9E mm1,mm2/m64 Add packed sngle-prec. floats. 3DNOW
PFCMPEQ 0F 0F /r B0 mm1,mm2/m64 Compare packed sngle-prec. floats for equality. 3DNOW
PFCMPGE 0F 0F /r 90 mm1,mm2/m64 Compare packed sngle-prec. floats for greater-than/equal. 3DNOW
PFCMPGT 0F 0F /r A0 mm1,mm2/m64 Compare packed sngle-prec. floats for greater-than. 3DNOW
PFMAX 0F 0F /r A4 mm1,mm2/m64 Maximum of packed sngle-prec. floats. 3DNOW
PFMIN 0F 0F /r 94 mm1,mm2/m64 Minimum of packed sngle-prec. floats. 3DNOW
PFMUL 0F 0F /r B4 mm1,mm2/m64 Multiply packed sngle-prec. floats. 3DNOW
PFNACC 0F 0F /r 8A mm1,mm2/m64 Negative accumulate packed sngle-prec. floats. 3DNOW
PFPNACC 0F 0F /r 8E mm1,mm2/m64 Mixed accumulate packed sngle-prec. floats. 3DNOW
PFRCP 0F 0F /r 96 mm1,mm2/m64 Reciprocal approximation of packed sngle-prec. floats. 3DNOW
PFRCPIT1 0F 0F /r A6 mm1,mm2/m64 Reciprocal of packed sngle-prec. float, 1st step. 3DNOW
PFRCPIT2 0F 0F /r B6 mm1,mm2/m64 Reciprocal of packed sngle-prec. float, 2nd step. 3DNOW
PFRSQIT1 0F 0F /r A7 mm1,mm2/m64 Reciprocal of packed sngle-prec. float sq. root, step 1. 3DNOW
PFRSQRT 0F 0F /r 97 mm1,mm2/m64 Reciprocal of packed sngle-prec. float sq. root. 3DNOW
PFSUB 0F 0F /r 9A mm1,mm2/m64 Subtract packed sngle-prec. floats. 3DNOW
PFSUBR 0F 0F /r AA mm1,mm2/m64 Reverse subtract packed sngle-prec. floats. 3DNOW
PI2FD 0F 0F /r 0D mm1,mm2/m64 Converts DWs to packed sngle-prec. floats. 3DNOW
PI2FD 0F 0F /r 0C mm1,mm2/m64 Converts words to packed sngle-prec. floats. 3DNOW
PINSRW 0F C4 /r ib mm,reg32/m16,imm8 Insert word into MMX register. SSE
PINSRW 66 0F C4 /r ib xmm,reg32/m16,imm8 Insert word into XMM register. SSE2
PMACHRIW 0F 5E /r mm,m64 Packed multiply and accumulate with rounding. MMX,CYRIX
PMADDWD 0F F5 /r mm1,mm2/m64 Multiply and add packed integers. MMX
PMADDWD 66 0F F5 /r xmm1,xmm2/m128 Multiply and add packed integers. SSE2
PMAGW 0F 52 /r mm1,mm2/m64 Packed magnitude of 4 words. MMX,CYRIX
PMAXSW 0F EE /r mm1,mm2/m64 Maximum of packed signed word integers. SSE
PMAXSW 66 0F EE /r xmm1,xmm2/m128 Maximum of packed signed word integers. SSE2
PMAXUB 0F DE /r mm1,mm2/m64 Maximum of packed unsigned byte integers. SSE
PMAXUB 66 0F DE /r xmm1,xmm2/m128 Maximum of packed unsigned byte integers. SSE2
PMINSW 0F EA /r mm1,mm2/m64 Minimum of packed signed word integers. SSE
PMINSW 66 0F EA /r xmm1,xmm2/m128 Minimum of packed signed word integers. SSE2
PMINUB 0F DA /r mm1,mm2/m64 Minimum of packed unsigned byte integers. SSE
PMINUB 66 0F DA /r xmm1,xmm2/m128 Minimum of packed unsigned byte integers. SSE2
PMOVMSKB 0F D7 /r reg32,mm Move byte mask to register. SSE
PMOVMSKB 66 0F D7 /r reg32,xmm Move byte mask to register. SSE2
PMULHRIW 0F 5D /r mm1,mm2/m64 Multiply packed words and round to implicit register. MMX,CYRIX
PMULHRW 0F 0F /r B7 mm1,mm2/m64 Multiply packed words, round and store high word. 3DNOW
PMULHRWC 0F 59 /r mm1,mm2/m64 Multiply packed words, round and store high word. MMX,CYRIX
PMULHUW 0F E4 /r mm1,mm2/m64 Multiply packed unsigned words and store high word. SSE
PMULHUW 66 0F E4 /r xmm1,xmm2/m128 Multiply packed unsigned words and store high word. SSE2
PMULHW 0F E5 /r mm1,mm2/m64 Multiply packed signed words and store high word. MMX
PMULHW 66 0F E5 /r xmm1,xmm2/m128 Multiply packed signed words and store high word. SSE2
PMULLW 0F D5 /r mm1,mm2/m64 Multiply packed signed words and store low word. MMX
PMULLW 66 0F D5 /r xmm1,xmm2/m128 Multiply packed signed words and store low word. SSE2
PMULUDQ 0F F4 /r mm1,mm2/m64 Multiply packed unsigned DWs. SSE2
PMULUDQ 66 OF F4 /r xmm1,xmm2/m128 Multiply packed unsigned DWs. SSE2
PMVGEZB 0F 5B /r mm,m64 Packed move if greater-than-or-equal. MMX,CYRIX
PMVLZB 0F 5A /r mm,m64 Packed move if less-than. MMX,CYRIX
PMVZB 0F 58 /r mm,m64 Packed move if not-equal. MMX,CYRIX
POP 0F CS Pop data to CS (only on some 8086s). 86,UNDOC
POP 1F DS Pop data to DS. 86
POP 58 eAX Pop data to register. 86/386
POP 5D eBP Pop data to register. 86/386
POP 5B eBX Pop data to register. 86/386
POP 59 eCX Pop data to register. 86/386
POP 5F eDI Pop data to register. 86/386
POP 5A eDX Pop data to register. 86/386
POP 07 ES Pop data to ES. 86
POP 5E eSI Pop data to register. 86/386
POP 5C eSP Pop data to register. 86/386
POP 0F A1 FS Pop data to FS. 386
POP 0F A9 GS Pop data to GS. 386
POP 8F /0 r/m Pop data to destination. 86,386
POP 17 SS Pop data to SS. SS
POPA 61 n/a Pop all General-purpose registers. 186/386
POPAD 61 n/a Pop all General-purpose registers. 186/386
POPF 9D n/a Pop CPU flags. 186/386
POPFD 9D n/a Pop CPU flags. 186/386
POR 0F EB /r mm1,mm2/m64 Bitwise OR of MMX register. MMX
POR 66 0F EB /r xmm1,xmm2/m128 Bitwise OR of XMM register. SSE2
PREFETCH 0F 0D /0 m8 Prefetch data into caches. 3DNOW
PREFETCHNTA0F 18 /mem|0 m8 Prefetch non-temporal data into caches. SSE,ATHLON
PREFETCHT0 0F 18 /mem|1 m8 Prefetch temporal data into caches. SSE,ATHLON
PREFETCHT1 0F 18 /mem|2 m8 Prefetch temporal data into 1st level cache. SSE,ATHLON
PREFETCHT2 0F 18 /mem|3 m8 Prefetch temporal data into 1st level cache. SSE,ATHLON
PREFETCHW 0F 0D /1 m8 Prefetch data into caches. 3DNOW
PSADBW 0F F6 /r mm1,mm2/m64 Compute sum of absolute differences. SSE2
PSADBW 66 0F F6 /r xmm1,xmm2/m128 Compute sum of absolute differences. SSE2
PSHUFD 66 0F 70 /r ib xmm1,xmm2/m128,imm8 Shuffle packed DWs. SSE2
PSHUFHW F3 0F 70 /r ib xmm1,xmm2/m128,imm8 Shuffle packed high words. SSE2
PSHUFLW F2 0F 70 /r ib xmm1,xmm2/m128,imm8 Shuffle packed low words. SSE2
PSHUFW 0F 70 /r ib mm1,mm2/m64,imm8 Shuffle packed words. SSE
PSLLD 0F 72 /3|6 ib mm,imm8 Left logical shift of packed DWs. MMX
PSLLD 0F F2 /r mm1,mm2/m64 Left logical shift of packed DWs. MMX
PSLLD 66 0F 72 /3|6 ibxmm,imm8 Left logical shift of packed DWs. SSE2
PSLLD 66 0F F2 /r xmm1,xmm2/m128 Left logical shift of packed DWs. SSE2
PSLLDQ 66 0F 73 /3|7 ibxmm1,imm8 Left logical shift of double qwords. SSE2
PSLLQ 0F 73 /3|6 ib mm,imm8 Left logical shift of packed qwords. MMX
PSLLQ 0F F3 /r mm1,mm2/m64 Left logical shift of packed qwords. MMX
PSLLQ 66 0F 73 /3|6 ibxmm,imm8 Left logical shift of packed qwords. SSE2
PSLLQ 66 0F F3 /r xmm1,xmm2/m128 Left logical shift of packed qwords. SSE2
PSLLW 0F 71 /3|6 ib mm,imm8 Left logical shift of packed words. MMX
PSLLW 0F F1 /r mm1,mm2/m64 Left logical shift of packed words. MMX
PSLLW 66 0F 71 /3|6 ibxmm,imm8 Left logical shift of packed words. SSE2
PSLLW 66 0F F1 /r xmm1,xmm2/m128 Left logical shift of packed words. SSE2
PSRAD 0F 72 /3|4 ib mm,imm8 Right arithmetic shift of packed DWs. MMX
PSRAD 0F E2 /r mm1,mm2/m64 Right arithmetic shift of packed DWs. MMX
PSRAD 66 0F 72 /3|4 ibxmm,imm8 Right arithmetic shift of packed DWs. SSE2
PSRAD 66 0F E2 /r xmm1, xmm2/m128 Right arithmetic shift of packed DWs. SSE2
PSRAW 0F 71 /4 ib mm,imm8 Right arithmetic shift of packed words. MMX
PSRAW 0F E1 /r mm1,mm2/m64 Right arithmetic shift of packed words. MMX
PSRAW 66 0F 71 /4 ib xmm,imm8 Right arithmetic shift of packed words. SSE2
PSRAW 66 0F E1 /r xmm1,xmm2/m128 Right arithmetic shift of packed words. SSE2
PSRLD 0F 72 /3|2 ib mm,imm8 Right logical shift of packed DWs. MMX
PSRLD 0F D2 /r mm1,mm2/m64 Right logical shift of packed DWs. MMX
PSRLD 66 0F 72 /3|2 ibxmm,imm8 Right logical shift of packed DWs. SSE2
PSRLD 66 0F D2 /r xmm1,xmm2/m128 Right logical shift of packed DWs. SSE2
PSRLDQ 66 0F 73 /3|3 ibxmm,imm8 Right logical shift of double qword. SSE2
PSRLQ 0F 73 /2 ib mm,imm8 Right logical shift of packed qwords. MMX
PSRLQ 0F D3 /r mm1,mm2/m64 Right logical shift of packed qwords. MMX
PSRLQ 66 0F 73 /2 ib xmm,imm8 Right logical shift of packed qwords. SSE2
PSRLQ 66 0F D3 /r xmm1,xmm2/m128 Right logical shift of packed qwords. SSE2
PSRLW 0F 71 /3|2 ib mm,imm8 Right logical shift of packed words. MMX
PSRLW 0F D1 /r mm1,mm2/m64 Right logical shift of packed words. MMX
PSRLW 66 0F 71 /3|2 ibxmm,imm8 Right logical shift of packed words. SSE2
PSRLW 66 0F D1 /r xmm1,xmm2/m128 Right logical shift of packed words. SSE2
PSUBB 0F F8 /r mm1,mm2/m64 Subtract packed byte integers. MMX
PSUBB 66 0F F8 /r xmm1,xmm2/m128 Subtract packed byte integers. SSE2
PSUBD 0F FA /r mm1,mm2/m64 Subtract packed DW integers. MMX
PSUBD 66 0F FA /r xmm1,xmm2/m128 Subtract packed DW integers. SSE2
PSUBQ 0F FB /r mm1,mm2/m64 Subtract packed qword integers. MMX
PSUBQ 66 0F FB /r xmm1,xmm2/m128 Subtract packed qword integers. SSE2
PSUBSB 0F E8 /r mm1,mm2/m64 Subtract packed signed byte integers. MMX
PSUBSB 66 0F E8 /r xmm1,xmm2/m128 Subtract packed signed byte integers. SSE2
PSUBSIW 0F 55 /r mm1,mm2/m64 Subtract packed words and store to implicit register. MMX,CYRIX
PSUBSW 0F E9 /r mm1,mm2/m64 Subtract packed signed word integers. MMX
PSUBSW 66 0F E9 /r xmm1,xmm2/m128 Subtract packed signed word integers. SSE2
PSUBUSB 0F D8 /r mm1,mm2/m64 Subtract packed unsigned byte integers. MMX
PSUBUSB 66 0F D8 /r xmm1,xmm2/m128 Subtract packed unsigned byte integers. SSE2
PSUBUSW 0F D9 /r mm1,mm2/m64 Subtract packed unsigned word integers. MMX
PSUBUSW 66 0F D9 /r xmm1,xmm2/m128 Subtract packed unsigned word integers. SSE2
PSUBW 0F F9 /r mm1,mm2/m64 Subtract packed word integers. MMX
PSUBW 66 0F F9 /r xmm1,xmm2/m128 Subtract packed word integers. SSE2
PSWAPW 0F 0F /r BB mm1,mm2/m64 Swap packed data. 3DNOW
PSWAPD 0F 0F /r BB mm1,mm2/m64 Swap packed data. 3DNOW
PUNPCKHBW 0F 68 /r mm1,mm2/m64 Unpack and interleave high-order bytes. MMX
PUNPCKHBW 66 0F 68 /r xmm1,xmm2/m128 Unpack and interleave high-order bytes. SSE2
PUNPCKHDQ 0F 6A /r mm1,mm2/m64 Unpack and interleave high-order DWs. MMX
PUNPCKHDQ 66 0F 6A /r xmm1,xmm2/m128 Unpack and interleave high-order DWs. SSE2
PUNPCKHQDQ 66 0F 6D /r xmm1,xmm2/m128 Unpack and interleave high-order qwords. SSE2
PUNPCKHWD 0F 69 /r mm1,mm2/m64 Unpack and interleave high-order words. MMX
PUNPCKHWD 66 0F 69 /r xmm1,xmm2/m128 Unpack and interleave high-order words. SSE2
PUNPCKLBW 0F 60 /r mm1,mm2/m32 Unpack and interleave low-order bytes. MMX
PUNPCKLBW 66 0F 60 /r xmm1,xmm2/m128 Unpack and interleave low-order bytes. SSE2
PUNPCKLDQ 0F 62 /r mm1,mm2/m32 Unpack and interleave low-order DWs. MMX
PUNPCKLDQ 66 0F 62 /r xmm1,xmm2/m128 Unpack and interleave low-order DWs. SSE2
PUNPCKLQDQ 66 0F 6C /r xmm1,xmm2/m128 Unpack and interleave low-order qwords. SSE2
PUNPCKLWD 0F 61 /r mm1,mm2/m32 Unpack and interleave low-order words. MMX
PUNPCKLWD 66 0F 61 /r xmm1,xmm2/m128 Unpack and interleave low-order words. SSE2
PUSH 0E CS Push CS onto the stack. 86
PUSH 1E DS Push DS onto the stack. 86
PUSH 50 eAX Push register onto the stack. 86/386
PUSH 55 eBP Push register onto the stack. 86/386
PUSH 53 eBX Push register onto the stack. 86/386
PUSH 51 eCX Push register onto the stack. 86/386
PUSH 57 eDI Push register onto the stack. 86/386
PUSH 52 eDX Push register onto the stack. 86/386
PUSH 06 ES Push ES onto the stack. 86
PUSH 56 eSI Push register onto the stack. 86/386
PUSH 54 eSP Push register onto the stack. 86/386
PUSH 0F A0 FS Push FS onto the stack. 386
PUSH 0F A8 GS Push GS onto the stack. 386
PUSH 68 imm Push immmediate word/DW onto the stack. 286
PUSH 6A imm8 Push immmediate byte onto the stack. 286
PUSH FF /6 r/m Push source onto the stack. 86/386
PUSH 16 SS Push SS onto the stack. 86
PUSHA 60 n/a Push all general-purpose registers. 186/386
PUSHAD 60 n/a Push all general-purpose registers. 186/386
PUSHF 9C n/a Push CPU flags. 186/386
PUSHFD 9C n/a Push CPU flags. 186/386
PXOR 0F EF /r mm1,mm2/m64 Bitwise XOR of 64-bit MMX operands. MMX
PXOR 66 0F EF /r xmm1,xmm2/m128 Bitwise XOR of 128-bit MMX operands. SSE3
RCL D1 /2 r/m,1 Rotate left through carry bit. 86/386
RCL D3 /2 r/m,CL Rotate left through carry bit. 86/386
RCL C1 /2 ib r/m,imm8 Rotate left through carry bit. 286
RCL D0 /2 r/m8,1 Rotate left through carry bit. 86
RCL D2 /2 r/m8,CL Rotate left through carry bit. 86
RCL C0 /2 ib r/m8,imm8 Rotate left through carry bit. 286
RCPPS 0F 53 /r xmm1,xmm2/m128 Reciprocals of packed sngle-prec. floats. SSE
RCPSS F3 0F 53 /r xmm1,xmm2/m32 Reciprocal of scalar sngle-prec. floats. SSE
RCR D1 /3 r/m,1 Rotate right through carry bit. 86/386
RCR D3 /3 r/m,CL Rotate right through carry bit. 86/386
RCR C1 /3 ib r/m,imm8 Rotate right through carry bit. 286
RCR D0 /3 r/m8,1 Rotate right through carry bit. 86
RCR D2 /3 r/m8,CL Rotate right through carry bit. 86
RCR C0 /3 ib r/m8,imm8 Rotate right through carry bit. 286
RDMSR 0F 32 n/a Read Model Specific Registers. P5,PRIV
RDPMC 0F 33 n/a Read performance-monitoring counters. P6
RDSHR 0F 36 /0 r/m32 Read SMM header pointer register. 386,CYRIX,SMM
RDTSC 0F 31 n/a Read time-stamp counter. P5
REP F3 (Prefix) Repeat while eCX<>0 and ZF=1. 86
REPE F3 (Prefix) Repeat while eCX<>0 and ZF=1. 86
REPZ F3 (Prefix) Repeat while eCX<>0 and ZF=1. 86
REPNE F2 (Prefix) Repeat while eCX<>0 and ZF=0. 86
REPNZ F2 (Prefix) Repeat while eCX<>0 and ZF=0. 86
RET C2 iw imm16 A near return from subroutine or procedure and pop data. 86
RETN C2 iw imm16 A near return from subroutine or procedure and pop data. 86
RET C3 n/a A near return from subroutine or procedure. 86
RETN C3 n/a A near return from subroutine or procedure. 86
RETF CB n/a A far return from subroutine or procedure. 86
RETF CA iw imm16 A far return from subroutine or procedure. 86
ROL D1 /0 r/m,1 Rotate left. 86,386
ROL D3 /0 r/m,CL Rotate left. 86,386
ROL C1 /0 ib r/m,imm8 Rotate left. 286
ROL D0 /0 r/m8,1 Rotate left. 86
ROL D2 /0 r/m8,CL Rotate left. 86
ROL C0 /0 ib r/m8,imm8 Rotate left. 286
ROR D1 /1 r/m,1 Rotate right. 86,386
ROR D3 /1 r/m,CL Rotate right. 86,386
ROR C1 /1 ib r/m,imm8 Rotate right. 286
ROR D0 /1 r/m8,1 Rotate right. 86
ROR D2 /1 r/m8,CL Rotate right. 86
ROR C0 /1 ib r/m8,imm8 Rotate right. 286
RSDC 0F 79 /r sreg,m80 Restore segment register and descriptor. 486,CYRIX,SMM
RSLDT 0F 7B /0 m80 Restore LDTR and descriptor. 486,CYRIX,SMM
RSM 0F AA n/a Resume from System Management Mode. P5
RSQRTPS 0F 52 /r xmm1,xmm2/m128 Reciprocals of sq. roots of packed sngle-prec.floats. SSE
RSQRTSS F3 0F 52 /r xmm1,xmm2/m32 Reciprocal of sq. root of packed sngle-prec. float. SSE
RSTS 0F 7D /0 m80 Restore TSR and descriptor. 486,CYRIX,SMM
SAHF 9E n/a Store AH into CPU flags. 86
SAL D1 /4 r/m,1 Left shift. 86/386
SAL D3 /4 r/m,CL Left shift. 86/386
SAL C1 /4 ib r/m,imm8 Left shift. 286
SAL D0 /4 r/m8,1 Left shift. 86
SAL D2 /4 r/m8,CL Left shift. 86
SAL C0 /4 ib r/m8,imm8 Left shift. 286
SALC D6 n/a Set AL from the CF (only on 8086). 86,UNDOC
SAR D1 /7 r/m,1 Arithmetic shift right. 86/386
SAR D3 /7 r/m,CL Arithmetic shift right. 86/386
SAR C1 /7 ib r/m,imm8 Arithmetic shift right. 286
SAR D0 /7 r/m8,1 Arithmetic shift right. 86
SAR D2 /7 r/m8,CL Arithmetic shift right. 86
SAR C0 /7 ib r/m8,imm8 Arithmetic shift right. 286
SBB 1C ib AL,imm8 Subtract two integers with borrow. 86
SBB 1D iv eAX,imm Subtract two integers with borrow. 86/386
SBB 81 /3 iw r/m,imm Subtract two integers with borrow. 86/386
SBB 83 /3 ib r/m,imm8 Subtract two integers with borrow. 86/386
SBB 19 /r r/m,reg Subtract two integers with borrow. 86/386
SBB 80 /3 ib r/m8,imm8 Subtract two integers with borrow. 86
SBB 82 /3 ib r/m8,imm8 Subtract two integers with borrow. 86
SBB 18 /r r/m8,reg8 Subtract two integers with borrow. 86
SBB 1B /r reg32,r/m Subtract two integers with borrow. 86/386
SBB 1A /r reg8,r/m8 Subtract two integers with borrow. 86
SCASB AE n/a Scan string byte. 86
SCASW AF n/a Scan string word. 86/386
SCASD AF n/a Scan string DW . 86/386
SETA 0F 97 /2 r/m8 Set byte if above (CF=0 and ZF=0). 386
SETNBE 0F 97 /2 r/m8 Set byte if above (CF=0 and ZF=0). 386
SETAE 0F 93 /2 r/m8 Set byte if above or equal (CF=0). 386
SETNB 0F 93 /2 r/m8 Set byte if above or equal (CF=0). 386
SETNC 0F 93 /2 r/m8 Set byte if above or equal (CF=0). 386
SETB 0F 92 /2 r/m8 Set byte if below (CF=1). 386
SETC 0F 92 /2 r/m8 Set byte if below (CF=1). 386
SETNAE 0F 92 /2 r/m8 Set byte if below (CF=1). 386
SETBE 0F 96 /2 r/m8 Set byte if below or equal (CF=1 or ZF=1). 386
SETNA 0F 96 /2 r/m8 Set byte if below or equal (CF=1 or ZF=1). 386
SETE 0F 94 /2 r/m8 Set byte if equal (ZF=1). 386
SETZ 0F 94 /2 r/m8 Set byte if equal (ZF=1). 386
SETG 0F 9F /2 r/m8 Set byte if greater (ZF=0 and SF=OF). 386
SETNLE 0F 9F /2 r/m8 Set byte if greater (ZF=0 and SF=OF). 386
SETGE 0F 9D /2 r/m8 Set byte if greater or equal (SF=OF). 386
SETNL 0F 9D /2 r/m8 Set byte if greater or equal (SF=OF). 386
SETLE 0F 9C /2 r/m8 Set byte if less (SF<>OF). 386
SETNGE 0F 9C /2 r/m8 Set byte if less (SF<>OF). 386
SETLE 0F 9E /2 r/m8 Set byte if less or equal (ZF=1 or SF<>OF). 386
SETNG 0F 9E /2 r/m8 Set byte if less or equal (ZF=1 or SF<>OF). 386
SETNE 0F 95 /2 r/m8 Set byte if not equal (ZF=0). 386
SETNZ 0F 95 /2 r/m8 Set byte if not equal (ZF=0). 386
SETNO 0F 91 /2 r/m8 Set byte if not overflow (OF=0). 386
SETNP 0F 9B /2 r/m8 Set byte if parity odd (PF=0). 386
SETPO 0F 9B /2 r/m8 Set byte if parity odd (PF=0). 386
SETNS 0F 99 /2 r/m8 Set byte if not sign (SF=0). 386
SETO 0F 90 /2 r/m8 Set byte if overflow (OF=1). 386
SETP 0F 9A /2 r/m8 Set byte if parity even (PF=1). 386
SETPE 0F 9A /2 r/m8 Set byte if parity even (PF=1). 386
SETS 0F 98 /2 r/m8 Set byte if sign (SF=1). 386
SFENCE 0F AE /3|7 n/a Store fence. SSE
SGDT 0F 01 /0 mem Store GDTR into memory. 286
SHL D1 /4 r/m,1 Logical left shift. 86/386
SHL D3 /4 r/m,CL Logical left shift. 86/386
SHL C1 /4 ib r/m,imm8 Logical left shift. 286
SHL D0 /4 r/m8,1 Logical left shift. 86
SHL D2 /4 r/m8,CL Logical left shift. 86
SHL C0 /4 ib r/m8,imm8 Logical left shift. 286
SHLD 0F A5 r/m,reg,CL Double prec. left shift. 386
SHLD 0F A4 r/m,reg,imm8 Double prec. left shift. 386
SHR D1 /5 r/m,1 Logical right shift. 86/386
SHR D3 /5 r/m,CL Logical right shift. 86,386
SHR C1 /5 ib r/m,imm8 Logical right shift. 286
SHR D0 /5 r/m8,1 Logical right shift. 86
SHR D2 /5 r/m8,CL Logical right shift. 86
SHR C0 /5 ib r/m8,imm8 Logical right shift. 286
SHRD 0F AD /r r/m,reg,CL Double prec. right shift. 386
SHRD 0F AC /r ib r/m,reg,imm8 Double prec. right shift. 386
SHUFPD 66 0F C6 /r ib xmm1,xmm2/m128,imm8 Shuffle packed dble-prec. floats. SSE2
SHUFPS 0F C6 /r ib xmm1,xmm2/m128,imm8 Shuffle packed sngle-prec. floats. SSE
SIDT 0F 01 /1 mem Store IDTR into memory. 286
SLDT 0F 00 /0 r/m16 Store LDTR into memory. 286
SMI F1 n/a System Management Interrupt (on some AMD 386/486s). 386,AMD,UNDOC
SMINT 0F 38 n/a Put processor into SMM mode. P5,CYRIX
SMINTOLD 0F 7E n/a Put processor into SMM mode (only 486). 486,CYRIX
SMSW 0F 01 /4 r/m16 Store MSW (the bottom half of CR0) into memory. 286
SQRTPD 66 0F 51 /r xmm1,xmm2/m128 sq. roots of packed dble-prec. floats. SSE2
SQRTPS 0F 51 /r xmm1,xmm2/m128 sq. roots of packed sngle-prec. floats. SSE
SQRTSD F2 0F 51 /r xmm1,xmm2/m64 sq. roots of scalar dble-prec. floats. SSE2
SQRTSS F3 0F 51 /r xmm1,xmm2/m32 sq. roots of scalar sngle-prec. floats. SSE
STC F9 n/a Set the CF flag. 86
STD FD n/a Set the DF flag. 86
STI FB n/a Set the IF flag (enable interrupts). 86
STMXCSR 0F AE /mem|3 m32 Store MXCSR state. SSE
STOSB AA n/a Store byte to string. 86
STOSW AB n/a Store word to string. 86/386
STOSD AB n/a Store DW to string. 86/386
STR 0F 00 /1 r/m16 Store TR into memory. 286
SUB 2C ib AL,imm8 Subtract two integers. 86
SUB 2D iv eAX,imm Subtract two integers. 86/386
SUB 81 /5 iv r/m,imm Subtract two integers. 86/386
SUB 83 /5 ib r/m,imm8 Subtract two integers. 86/386
SUB 29 /r r/m,reg Subtract two integers. 86/386
SUB 80 /5 ib r/m8,imm8 Subtract two integers. 86
SUB 82 /5 ib r/m8,imm8 Subtract two integers. 86
SUB 28 /r r/m8,reg8 Subtract two integers. 86
SUB 2B /r reg,r/m Subtract two integers. 86/386
SUB 2A /r reg8,r/m8 Subtract two integers. 86
SUBPD 66 0F 5C /r xmm1,xmm2/m128 Subtract packed dble-prec. floats. SSE2
SUBPS 0F 5C /r xmm1,xmm2/m128 Subtract packed sngle-prec. floats. SSE
SUBSD F2 0F 5C /r xmm1,xmm2/m128 Subtract scalar dble-prec. floats. SSE2
SUBSS F3 0F 5C /r xmm1,xmm2/m128 Subtract scalar sngle-prec. floats. SSE
SVDC 0F 78 /r sreg,m80 Save segment register and descriptor. 486,CYRIX,SMM
SVLDT 0F 7A /0 m80 Save LDTR and descriptor. 486,CYRIX,SMM
SVTS 0F 7C /0 m80 Save TSR and descriptor. 486,CYRIX,SMM
SYSCALL 0F 05 n/a Call operating system. P6,AMD
SYSENTER 0F 34 n/a Fast system call. P6
SYSEXIT 0F 35 n/a Fast return from fast system call. P6,PRIV
SYSRET 0F 07 n/a Return from operating system. P6,AMD,PRIV
TEST A8 ib AL,imm8 Bitwise test of two integers. 86
TEST A9 iv eAX,imm Bitwise test of two integers. 86/386
TEST F7 /0 iv r/m,imm Bitwise test of two integers. 86/386
TEST 85 /r r/m,reg Bitwise test of two integers. 86/386
TEST F6 /0 ib r/m8,imm8 Bitwise test of two integers. 86
TEST 84 /r r/m8,reg8 Bitwise test of two integers. 86
UCOMISD 66 0F 2E /r xmm1,xmm2/m128 Unordered compare scalar dble-prec. floats. SSE2
UCOMISS 0F 2E /r xmm1,xmm2/m128 Unordered compare scalar dble-prec. floats. SSE
UD0 0F FF n/a Used by AMD for an invalid opcode exception. 186,UNDOC
UD1 0F B9 n/a Used by Intel for an invalid opcode exception. 186,UNDOC
UD2 0F 0B n/a Undefined instruction (for invalid opcode exception). 186
UMOV 0F 11 /r r/m,reg Move user data (on some AMD and IBM 386/486s). 386,AMD,UNDOC
UMOV 0F 10 /r r/m8,reg8 Move user data (on some AMD and IBM 386/486s). 386,AMD,UNDOC
UMOV 0F 13 /r reg,r/m Move user data (on some AMD and IBM 386/486s). 386,AMD,UNDOC
UMOV 0F 12 /r reg8,r/m8 Move user data (on some AMD and IBM 386/486s). 386,AMD,UNDOC
UNPCKHPD 66 0F 15 /r xmm1,xmm2/m128 Interleaved unpack of high packed dble-prec. floats. SSE2
UNPCKHPS 0F 15 /r xmm1,xmm2/m128 Interleaved unpack of high packed sngle-prec. floats. SSE
UNPCKLPD 66 0F 14 /r xmm1,xmm2/m128 Interleaved unpack of low packed dble-prec. floats. SSE2
UNPCKLPS 0F 14 /r xmm1,xmm2/m128 Interleaved unpack of low packed sngle-prec. floats. SSE
VERR 0F 00 /4 r/m16 Verify a segment for reading. 286
VERW 0F 00 /5 r/m16 Verify a segment for writing. 286
WAIT 9B n/a Wait until all pending FPU exceptions have happened. 86
FWAIT 9B n/a Wait until all pending FPU exceptions have happened. 86
WBINVD 0F 09 n/a Write back and invalidate cache. 486,PRIV
WRMSR 0F 30 n/a Write model-specific register. P5,PRIV
WRSHR 0F 37 /0 r/m32 Read SMM header pointer register. 386,CYRIX,SMM
XADD 0F C1 /r r/m,reg Exchange and add. 486
XADD 0F C0 /r r/m8,reg8 Exchange and add. 486
XBTS 0F A6 /r reg,r/m Write bits from r/m to reg (only on the old 386s). 386,UNDOC
XCHG 95 eAX,eBP or reverse Exchange contents of two registers. 86/386
XCHG 93 eAX,eBX or reverse Exchange contents of two registers. 86/386
XCHG 91 eAX,eCX or reverse Exchange contents of two registers. 86/386
XCHG 97 eAX,eDI or reverse Exchange contents of two registers. 86/386
XCHG 92 eAX,eDX or reverse Exchange contents of two registers. 86/386
XCHG 96 eAX,eSI or reverse Exchange contents of two registers. 86/386
XCHG 94 eAX,eSP or reverse Exchange contents of two registers. 86/386
XCHG 87 /r r/m,reg or reverse Exchange contents of two operands. 86/386
XCHG 86 /r r/m8,reg8 or reverseExchange contents of two operands. 86
XLAT D7 n/a Move byte from [eBX+AL] into AL. 86
XLATB D7 n/a Move byte from [eBX+AL] into AL. 86
XOR 34 ib AL,imm8 Bitwise XOR of two registers. 86
XOR 35 iv eAX,imm Bitwise XOR of two registers. 86,386
XOR 81 /6 iw r/m,imm Bitwise XOR of two registers. 86,386
XOR 83 /6 ib r/m,imm8 Bitwise XOR of two registers. 86,386
XOR 31 /r r/m,reg Bitwise XOR of two registers. 86,386
XOR 80 /6 ib r/m8,imm8 Bitwise XOR of two registers. 86
XOR 82 /6 ib r/m8,imm8 Bitwise XOR of two registers. 86
XOR 30 /r r/m8,reg8 Bitwise XOR of two registers. 86
XOR 33 /r reg,r/m Bitwise XOR of two registers. 86,386
XOR 32 /r reg8,r/m8 Bitwise XOR of two registers. 86
XORPD 66 0F 57 /r xmm1,xmm2/m128 Bitwise XOR of dble-prec. floats. SSE2
XORPS 0F 57 /r xmm1,xmm2/m128 Bitwise XOR of sngle-prec. floats. SSE